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參數(shù)資料
| 型號： | MC33990 |
| 廠商： | 飛思卡爾半導(dǎo)體(中國)有限公司 |
| 英文描述： | J-1850 SERIAL TRANSCEIVER(J-1850總線收發(fā)器) |
| 中文描述： | 殲1850串行收發(fā)器（的J - 1850總線收發(fā)器） |
| 文件頁數(shù)： | 12/16頁 |
| 文件大?。?/td> | 455K |
| 代理商： | MC33990 |
33990
12
Go to: www.freescale.com
Waveshaping
Waveshaping is incorporated into the 33990 to minimize
radiated EMI emissions.
Receiver Protocol
The Class B communication scheme uses a variable pulse
width (VPW) protocol. The microcontroller provides the VPW
decoding function. Once the receiver detects a transition on Rx,
it starts an internal counter. The initial “start of frame” bit is a
logic [1] and lasts 200 μs. For subsequent bits, if there is a bus
transition before 96 μs, one logic state is inferred. If there is a
bus transition after 96 μs, the other logic state is inferred. The
“end of data” bit is a logic [0] and lasts 200 μs. If there is no
activity on the bus for 280 μs to 320 μs following a broadcast
message, multiple unit nodes may arbitrate for control of the
next message. During an arbitration, after the “start of frame” bit
has been transmitted, the secondary node transmitting the
most consecutive logic [0] bits will be granted sole transmission
access to the bus for that message.
Loss of Assembly Ground Connection
The definition of a loss of assembly ground condition at the
device level is that all pins of the 33990, with the exception of
BUS and LOAD, see a very low impedance to V
BAT
.
The LOAD pin of the device has an internal transistor switch
connected to it that is normally saturated to ground. This pulls
the LOAD-side of the external resistor (tied from BUS to LOAD)
to ground under normal conditions. The LOAD pin switch is
essentially that of an “upside down” FET, which is normally
biased “on” so long as module ground is present and biased
“off” when loss-of-ground occurs. When a loss of assembly
ground occurs, the load transistor switch is self-biased “off”,
allowing no more than 100 μA of leakage current to flow in the
LOAD pin. During such a loss of assembly ground condition, the
BUS and LOAD pins exhibit a high impedance to V
BAT
; all other
pins will exhibit a low impedance to V
BAT
. During this condition
the BUS pin is prevented from sourcing any current or loading
the bus, which would cause a corruption of any data being
transmitted on the bus. While a particular assembly is
experiencing a loss of ground, all other assembly nodes are
permitted to function normally. It should be noted that with other
nodes existing on the bus, the bus will always have some
minimum/maximum impedance to ground as shown in Table 1,
page 11.
Loss of Assembly Battery Connection
The definition of a loss of assembly battery condition at the
device level is that the V
BAT
pin of the 33990 sees an infinite
impedance to V
BAT
, but there is some undefined impedance
between these pins and ground.
F
Freescale Semiconductor, Inc.
For More Information On This Product,
n
.
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