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參數(shù)資料
| 型號： | MC34701R2 |
| 廠商： | 飛思卡爾半導體(中國)有限公司 |
| 英文描述： | 1.5 A Switch-Mode Power Supply with Linear Regulator |
| 中文描述： | 1.5開關(guān)模式電源，線性穩(wěn)壓器 |
| 文件頁數(shù)： | 21/38頁 |
| 文件大?。?/td> | 739K |
| 代理商： | MC34701R2 |
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Analog Integrated Circuit Device Data
Freescale Semiconductor
21
34701
FUNCTIONAL DESCRIPTION
FUNCTIONAL DEVICE OPERATION
FUNCTIONAL DEVICE OPERATION
OPERATIONAL MODES
THERMAL SHUTDOWN
To increase the overall safety of the system designed with
the 34701, an internal Thermal Shutdown function has been
incorporated into the switching regulator circuit. The 34701
senses the temperature of the buck regulator main switching
MOSFET (high-side MOSFET M1; see
Figure 2
on page
2
),
the low-side (synchronous MOSFET M2), and control circuit.
If the temperature of any of the monitored components
exceeds the limit of safe operation (Thermal Shutdown), the
switching regulator and the LDO shut down. After the
temperature falls below the value given by the Thermal
Shutdown hysteresis window, the switcher tries again to
operate.
The V
OUT
pulldown MOSFET M3 has an independent
Thermal Shutdown control. If the M3 temperature exceeds
the Thermal Shutdown, the M3 is turned off without affecting
the switcher operation.
The LDO pulldown MOSFET M4 has an independent
Thermal Shutdown control. If the M4 temperature exceeds
the Thermal Shutdown, the M4 will be turned off without
affecting the LDO operation.
SOFT START
A switching regulator soft start feature is incorporated in
the 34701. The soft start is active each time the IC is enabled,
VIN is reapplied, or after a fault retry. Other transient events
do not activate the soft start.
VOLTAGE MARGINING
The 34701 includes a voltage margining feature accessed
through the I
2
C bus. Voltage margining allows for
independent adjustment of the Switcher V
OUT
voltage and
the linear output V
LDO
. Each can be adjusted up and down
in 1.0% steps to a range of ±7.0%. This feature allows for
worst case system validation; i.e., determining the design
margin. Margining details are described in the section entitled
I
2
C Bus Operation, beginning on page
26
of this datasheet.
POWER SEQUENCING MODES
The power sequencing of the two outputs of this power
supply IC is in compliance with the Freescale Power QUICC
and other 32-bit microprocessor requirements. When the
input voltage is applied, the switcher and linear regulator
outputs follow the supply rail voltage during power-up and
power-down in the limits given by the microcontroller power
sequencing specification, illustrated in
Figures 17
through
19
. There are two possible power sequencing modes,
Standard and Inverted, as explained in more detail below.
The third mode of operation is Power Sequencing Disabled.
Figure 17. Standard Power Up/Down Sequence
in +3.3 V Supply System
V = 2.1 V
Max. Lead
V = 0.4 V
Max. Lag
V = 2.1 V
Max. Lead
Slope
1.0 V/ms
1.8V Start-Up
3.3 V Input Supply (I/O Voltage)
1.5 V Core Voltage
Other
Circuits
RT
VBD
VBST
VDDL (Core)
VDDH (I/Os)
MCU
34701
3.3 V Input
VIN2
CLKSEL
FREQ
GND
SDA
SCL
2.5 V
ADDR
VIN1
LDRV
CS
LDO
LFB
RST
SW
PGND
INV
BOOT
VOUT
CLKSYN
Optional
EN1
EN2
VBST
VDDI
3.3 V
1.5 V
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