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參數(shù)資料
| 型號： | MC34C87D |
| 廠商： | MOTOROLA INC |
| 元件分類： | 通用總線功能 |
| 英文描述： | Quad EIA-422-A Line Driver |
| 中文描述： | DUAL LINE DRIVER, PDSO16 |
| 封裝： | SOG-16 |
| 文件頁數(shù)： | 2/4頁 |
| 文件大小： | 116K |
| 代理商： | MC34C87D |
MC34C87
2
MOTOROLA
TRUTH TABLE
Control Input
Input
Non–Inverting
Output
Inverting
Output
L
X
Z
Z
H
H
H
L
H
L
L
H
X = Don’t Care
Z = High Impedance
H = High Logic State
L = Low Logic State
MAXIMUM RATINGS
Rating
Symbol
Value
Unit
Power Supply Voltage
VCC
Vin
Vout
Iout
IDD
Tstg
PD
7
V
DC Input Voltage
– 1.5 to VCC + 1.5
– 0.5 to VCC + 0.5
150
V
DC Output Voltage*
V
DC Output Current, per Pin
mA
DC VCC or GND Current, per Pin
Storage Temperature
150
mA
– 65 to + 150
°
C
Power Dissipation
500
mW
ESD (Human Body Model)
2000
V
* Power–on conditions.
OPERATING CONDITIONS
Rating
Symbol
Min
Max
Unit
Power Supply Voltage
VCC
Vin
TA
tr, tf
4.5
5.5
V
DC Input Voltage
0
VCC
+ 85
V
Operating Temperature Range
– 40
°
C
Input Rise and Fall Time
—
500
ns
DC CHARACTERISTICS
(VCC = 4.5 to 5.5 V, TA = – 40 to +
85
°
C, unless otherwise stated)
Parameter
Symbol
Min
Typ
Max
Unit
Input Voltage (Low Logic State)
VIL
VIH
VOL
VOH
VOD
D(VOD)
VOS
D(VOS)
Iin
ICC
IOS
IO(Z)
Ioxh
Ioxl
—
—
0.8
V
Input Voltage (High Logic State)
2.0
—
—
V
Output Voltage (Low Logic State) Isink = 20 mA
Output Voltage (High Logic State) Isource = – 20 mA
Output Differential Voltage RL = 100
(Note 1)
Output Differential Voltage Difference RL = 100
(Note 1)
Output Offset Voltage RL = 100
(Note 1)
Output Offset Voltage Difference RL = 100
(Note 1)
Input Current Vin = VCC, GND, VIH or VIL
Quiescent Supply Current Iout = 0
μ
A
Output Short Circuit Current (Note 2)
—
0.3
0.5
V
2.5
2.8
—
V
2.0
—
—
V
—
—
±
0.4
V
—
—
3.0
V
—
—
±
0.4
V
—
—
±
1.0
μ
A
—
—
3.0
mA
– 30
– 100
– 150
mA
Output Leakage Current (High–Z State) Vout = VCC or GND
Output Leakage Current (Power Off)
—
—
±
1.0
μ
A
Vout = 6 V
Vout = – 0.25 V
—
—
—
—
100
– 100
μ
A
NOTES:
1. See EIA specifications EIA–422–A for exact test conditions.
2. Only one output may be shorted at a time.
This device contains circuitry to protect the
inputs against damage due to high static volt-
ages or electric fields; however, it is advised that
normal precautions be taken to avoid applica-
tions of any voltage higher than the maximum
rated voltages to this high impedance circuit.
For proper operation it is recommended that
Vin and Vout be constrained to the range VSS
≤
(Vin or Vout)
≤
VDD. Reliability of operation is
enhanced if unused inputs are tied to and
appropriate logic voltage level (e.g., either VSS
or VDD).
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