Pin Descriptions
MC44BS374T1/374T1A Advance Information
The device can be powered down without holding the I2C lines down
Switch between the two integrated VCO’s controlled directly by the frequency divider (@ 700
MHz)
The external standby pin is no more required as the I2C lines are not hold down when the device is
not powered up.
The standby pin is replaced by the LOP Logic Ouput Port pin (pin 3)
Lower RF second harmonic spurious but higher third harmonic spurious. In the application it is
easier to filter UHF third harmonics spurious than second harmonics as these frequencies are always
out of the UHF band. Unfortunately the second harmonic can fall back into the same UHF band (for
instance channel 21 second harmonic). For this reason it is almost impossible to have a good
rejection of low UHF second harmonic with an external low pass filter. This is the reason why the
design has been optimized for a maximum second harmonic rejection in spite of an increase of the
third harmonic.
3 Pin Descriptions
Table 1. SO16 Package Pin Descriptions
Pin number
Pin Name
Description
1
SCL
I2C clock
2
SDA
I2C data
3
LOP
Logical output port controlled by I2C bus
4
XTAL
Crystal
5
GND
Ground
6
PREEMP
Pre-emphasis capacitor
7
AUDIO
Audio input
8
SPLFLT
Sound PLL loop filter
9
VIDEO
Video input
10
VCCA
Main analog supply voltage
11
GND
Analog ground
12
TVOUT
TV output signal
13
TVOVCC
TV output stage supply voltage
14
PLLFLT
RF PLL loop filter
15
VCCD
Digital supply voltage
16
GNDD
Digital ground
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Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
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