參數(shù)資料
型號(hào): MC54HC00AJ
廠商: MOTOROLA INC
元件分類: 通用總線功能
英文描述: Quad 2-Input NAND Gate
中文描述: HC/UH SERIES, QUAD 2-INPUT NAND GATE, CDIP14
封裝: CERAMIC, DIP-14
文件頁(yè)數(shù): 2/7頁(yè)
文件大小: 167K
代理商: MC54HC00AJ
MOTOROLA
High–Speed CMOS Logic Data
DL129 — Rev 6
2
450
Tstg
TL
Storage Temperature
TSSOP Package
– 65 to + 150
C
Lead Temperature, 1 mm from Case for 10 Seconds
C
Functional operation should be restricted to the Recommended Operating Conditions.
Derating — Plastic DIP: – 10 mW/ C from 65 to 125 C
Ceramic DIP: – 10 mW/ C from 100 to 125 C
SOIC Package: – 7 mW/ C from 65 to 125 C
TSSOP Package: – 6.1 mW/ C from 65 to 125 C
0
400
VCC = 6.0 V
This device contains protection
circuitry to guard against damage
due to high static voltages or electric
fields. However, precautions must
be taken to avoid applications of any
voltage higher than maximum rated
voltages to this high–impedance cir-
cuit. For proper operation, Vin and
Vout should be constrained to the
range GND (Vin or Vout)
Unused inputs must always be
tied to an appropriate logic voltage
level (e.g., either GND or VCC).
Unused outputs must be left open.
VCC.
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