參數(shù)資料
型號: MC56F8322VFAE
廠商: Freescale Semiconductor
文件頁數(shù): 53/136頁
文件大?。?/td> 0K
描述: IC DSP 16BIT 60MHZ 48-LQFP
標準包裝: 250
系列: 56F8xxx
核心處理器: 56800E
芯體尺寸: 16-位
速度: 60MHz
連通性: CAN,SCI,SPI
外圍設(shè)備: POR,PWM,溫度傳感器,WDT
輸入/輸出數(shù): 21
程序存儲器容量: 40KB(20K x 16)
程序存儲器類型: 閃存
RAM 容量: 6K x 16
電壓 - 電源 (Vcc/Vdd): 2.25 V ~ 3.6 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 6x12b
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 105°C
封裝/外殼: 48-LQFP
包裝: 托盤
配用: MC56F8323EVME-ND - BOARD EVALUATION MC56F8323
Signal Pins
56F8322 Technical Data, Rev. 16
Freescale Semiconductor
23
Preliminary
MOSI0
(GPIOB2)
18
Schmitt
Input/
Output
Schmitt
Input/
Output
In reset,
output is
disabled,
pull-up is
enabled
SPI 0 Master Out/Slave In — This serial data pin is an output from a
master device and an input to a slave device. The master device
places data on the MOSI line a half-cycle before the clock edge the
slave device uses to latch the data.
Port B GPIO — This GPIO pin can be individually programmed as an
input or output pin.
After reset, the default state is MOSI0.
MISO0
(RXD1)
(GPIOB1)
16
Schmitt
Input/
Output
Schmitt
Input
Schmitt
Input/
Output
Input,
pull-up
enabled
SPI 0 Master In/Slave Out — This serial data pin is an input to a
master device and an output from a slave device. The MISO line of a
slave device is placed in the high-impedance state if the slave device
is not selected. The slave device places data on the MISO line a
half-cycle before the clock edge the master device uses to latch the
data.
Receive Data — SCI1 receive data input
Port B GPIO - This GPIO pin can be individually programmed as an
input or output pin.
After reset, the default state is MISO0.
SS0
(TXD1)
(GPIOB0)
15
Schmitt
Input
Schmitt
Output
Schmitt
Input/
Output
Input,
pull-up
enabled
SPI 0 Slave Select — SS0 is used in slave mode to indicate to the
SPI module that the current transfer is to be received.
Transmit Data — SCI1 transmit data output
Port B GPIO — This GPIO pin can be individually programmed as an
input or output pin.
After reset, the default state is SS0.
PWMA0
(GPIOA0)
3Schmitt
Output
Schmitt
Input/
Output
In reset,
output is
disabled,
pull-up is
enabled
PWMA0 — This is one of six PWMA output pins.
Port A GPIO — This GPIO pin can be individually programmed as an
input or output pin.
In the 56F8322, the default state after reset is PWMA0.
In the 56F8122, the default state is not one of the functions offered
and must be reconfigured.
Table 2-2 Signal and Package Information for the 48-Pin LQFP (Continued)
Signal Name
Pin No.
Type
State During
Reset
Signal Description
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MC56F8322VFAER2 功能描述:數(shù)字信號處理器和控制器 - DSP, DSC 16 BIT HYBRID CNTRLR RoHS:否 制造商:Microchip Technology 核心:dsPIC 數(shù)據(jù)總線寬度:16 bit 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:2 KB 最大時鐘頻率:40 MHz 可編程輸入/輸出端數(shù)量:35 定時器數(shù)量:3 設(shè)備每秒兆指令數(shù):50 MIPs 工作電源電壓:3.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TQFP-44 安裝風格:SMD/SMT
MC56F8323 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:16-bit Digital Signal Controllers
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