參數(shù)資料
型號： MC56F8345
廠商： Motorola, Inc.
英文描述： 56F8345 16-bit Hybrid Controller
中文描述： 56F8345 16位混合控制器
文件頁數(shù)： 98/148頁
文件大小： 1420K
代理商： MC56F8345
98
56F8345 Technical Data
Preliminary
6.5.1.4
Stop Disable (STOP_DISABLE)—Bits 3–2
00 = Stop mode will be entered when the 56800E core executes a STOP instruction
01 = The 56800E STOP instruction will not cause entry into Stop mode; STOP_DISABLE can be
reprogrammed in the future
10 = The 56800E STOP instruction will not cause entry into Stop mode; STOP_DISABLE can then
only be changed by resetting the device
11 = Same operation as 10
6.5.1.5
Wait Disable (WAIT_DISABLE)—Bits 1–0
00 = Wait mode will be entered when the 56800E core executes a WAIT instruction
01 = The 56800E WAIT instruction will not cause entry into Wait mode; WAIT_DISABLE can be
reprogrammed in the future
10 = The 56800E WAIT instruction will not cause entry into Wait mode; WAIT_DISABLE can then
only be changed by resetting the device
11 = Same operation as 10
6.5.2
Bits in this register are set upon any system reset and are initialized only by a Power-On Reset
(POR). A reset (other than POR) will only set bits in the register; bits are not cleared. Only software
should clear this register.
SIM Reset Status Register (SIM_RSTSTS)
Figure 6-4 SIM Reset Status Register (SIM_RSTSTS)
6.5.2.1
This bit field is reserved or not implemented. It is read as 0 and cannot be modified by writing.
Reserved—Bits 15–6
6.5.2.2
When 1, this bit indicates that the previous reset occurred as a result of a software reset (write to
SW RST bit in the SIM_CONTROL register). This bit will be cleared by any hardware reset or by
software. Writing a 0 to this bit position will set the bit, while writing a 1 to the bit will clear it.
Software Reset (SWR)—Bit 5
6.5.2.3
When 1, the COPR bit indicates the Computer Operating Properly (COP) timer-generated reset has
occurred. This bit will be cleared by a Power-On Reset or by software. Writing a 0 to this bit
position will set the bit, while writing a 1 to the bit will clear it.
COP Reset (COPR)—Bit 4
6.5.2.4
If 1, the EXTR bit indicates an external system reset has occurred. This bit will be cleared by a
Power-On Reset or by software. Writing a 0 to this bit position will set the bit, while writing a 1 to
the bit position will clear it. Basically, when the EXTR bit is 1, the previous system reset was
caused by the external RESET pin being asserted low.
External Reset (EXTR)—Bit 3
Base + $1
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
Read
0
0
0
0
0
0
0
0
0
0
SWR
COPR
EXTR
POR
0
0
Write
RESET
0
0
0
0
0
0
0
0
0
0
0
0
F
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
n
.
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MC56F8345MFG60 功能描述:數(shù)字信號處理器和控制器 - DSP, DSC 60MHz 60MIPS RoHS:否 制造商:Microchip Technology 核心:dsPIC 數(shù)據(jù)總線寬度:16 bit 程序存儲(chǔ)器大小:16 KB 數(shù)據(jù) RAM 大小:2 KB 最大時(shí)鐘頻率:40 MHz 可編程輸入/輸出端數(shù)量:35 定時(shí)器數(shù)量:3 設(shè)備每秒兆指令數(shù):50 MIPs 工作電源電壓:3.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TQFP-44 安裝風(fēng)格:SMD/SMT
MC56F8345MFGE 功能描述:數(shù)字信號處理器和控制器 - DSP, DSC 60MHz/60MIPS RoHS:否 制造商:Microchip Technology 核心:dsPIC 數(shù)據(jù)總線寬度:16 bit 程序存儲(chǔ)器大小:16 KB 數(shù)據(jù) RAM 大小:2 KB 最大時(shí)鐘頻率:40 MHz 可編程輸入/輸出端數(shù)量:35 定時(shí)器數(shù)量:3 設(shè)備每秒兆指令數(shù):50 MIPs 工作電源電壓:3.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TQFP-44 安裝風(fēng)格:SMD/SMT
MC56F8345VFG60 功能描述:數(shù)字信號處理器和控制器 - DSP, DSC 60MHz 60MIPS RoHS:否 制造商:Microchip Technology 核心:dsPIC 數(shù)據(jù)總線寬度:16 bit 程序存儲(chǔ)器大小:16 KB 數(shù)據(jù) RAM 大小:2 KB 最大時(shí)鐘頻率:40 MHz 可編程輸入/輸出端數(shù)量:35 定時(shí)器數(shù)量:3 設(shè)備每秒兆指令數(shù):50 MIPs 工作電源電壓:3.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TQFP-44 安裝風(fēng)格:SMD/SMT
MC56F8345VFGE 功能描述:數(shù)字信號處理器和控制器 - DSP, DSC 16 BIT HYBRID CONTROLLER RoHS:否 制造商:Microchip Technology 核心:dsPIC 數(shù)據(jù)總線寬度:16 bit 程序存儲(chǔ)器大小:16 KB 數(shù)據(jù) RAM 大小:2 KB 最大時(shí)鐘頻率:40 MHz 可編程輸入/輸出端數(shù)量:35 定時(shí)器數(shù)量:3 設(shè)備每秒兆指令數(shù):50 MIPs 工作電源電壓:3.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TQFP-44 安裝風(fēng)格:SMD/SMT
MC56F8346 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:16-bit Digital Signal Controllers
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