參數(shù)資料
型號: MC56F8345MFGE
廠商: Freescale Semiconductor
文件頁數(shù): 108/172頁
文件大?。?/td> 0K
描述: IC DSP 16BIT 60MHZ 128-LQFP
標(biāo)準(zhǔn)包裝: 72
系列: 56F8xxx
核心處理器: 56800E
芯體尺寸: 16-位
速度: 60MHz
連通性: CAN,EBI/EMI,SCI,SPI
外圍設(shè)備: POR,PWM,溫度傳感器,WDT
輸入/輸出數(shù): 49
程序存儲器容量: 136KB(68K x 16)
程序存儲器類型: 閃存
RAM 容量: 6K x 16
電壓 - 電源 (Vcc/Vdd): 2.25 V ~ 3.6 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 16x12b
振蕩器型: 外部
工作溫度: -40°C ~ 125°C
封裝/外殼: 128-LQFP
包裝: 托盤
配用: MC56F8367EVME-ND - EVAL BOARD FOR MC56F83X
56F8345 Technical Data, Rev. 17
40
Freescale Semiconductor
Preliminary
After reset, the OMR MA bit can be changed and will have an effect on the P-space memory map, as shown
in Table 4-3. Changing the OMR MB bit will have no effect.
Table 4-4 shows the memory map options of the 56F8345/56F8145. The two right columns cannot be
used, since the EMI pins are not provided in the package; therefore, only the Mode 0 column is relevant.
Note: Program RAM is NOT available on the 56F8145 device.
1
Mode 1 – External Boot; Flash Memory is not secured; EMI configuration is
determined by the state of the EMI_MODE pin
1. Information in shaded areas not applicable to 56F8345/56F8145.
2. This bit is only configured at reset. If the Flash secured state changes, this will not be reflected in MB until the next reset.
3. Changing MB in software will not affect Flash memory security.
Table 4-3 Changing OMR MA Value During Normal Operation
OMR MA
Chip Operating Mode
0
Use internal P-space memory map configuration
11
1. Setting this bit can cause unpredictable results and is not recommended, since the EMI is not functional in this package.
Use external P-space memory map configuration – If MB = 0 at reset, changing this bit has no effect.
Table 4-2 OMR MB/MA Value at Reset1 (Continued)
OMR MB =
Flash Secured
State2,3
OMR MA =
EXTBOOT Pin
Chip Operating Mode
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