參數(shù)資料
型號(hào): MC68175
廠商: Motorola, Inc.
英文描述: FLEXchip Decoder(FLEXchip譯碼器)
中文描述: FLEXchip解碼器(FLEXchip譯碼器)
文件頁數(shù): 2/4頁
文件大?。?/td> 113K
代理商: MC68175
MC68175
Flexchip Features
2
MC68175P/D, Preliminary
MOTOROLA
FLEXchip FEATURES
FLEX paging protocol signal processor
Sixteen programmable user address words
Sixteen fixed temporary addresses
1600, 3200, and 6400 bits per second (bps) decoding
Any-phase decoding
Uses standard Serial Peripheral Interface (SPI) in Slave mode
Wide operating voltage range from 3.3 V down to 1.8 V
Allows low current Stop mode operation of host processor
Highly programmable receiver control
Real time clock time base
FLEX fragmentation, and group messaging support
Real time clock over-the-air update support
Compatible with synthesized receivers
Low battery indication (external detector)
32-pin Thin Quad Flat Pack (TQFP) package
Operating temperature range 0o to +70oC (32o to 158oF)
FLEXchip SYSTEM DESIGN
The FLEXchip IC connects to a receiver capable of converting a 4-level audio signal into a 2-
bit digital signal (see
Figure 2
). The FLEXchip IC has eight receiver control lines used for
warming up and shutting down a receiver in stages. The FLEXchip IC has dual bandwidth
control signals for two post-detection filter bandwidths for receiving the two symbol rates of
the FLEX signal. The FLEXchip IC has the ability to detect a low battery signal during the
receiver control sequences. It interfaces to a back-end host MCU through a standard SPI. It
has a 38.4 kHz clock output capable of driving other devices. It has a 1 minute timer that
offers low power support for time of day function on the host.
All data communicated between the FLEXchip IC and the host MCU is transmitted on the
SPI in 32-bit packets. Each packet consists of an 8-bit ID followed by 24 bits of information.
The FLEXchip IC uses the SPI bus in Full Duplex mode. In other words, whenever a packet
communication occurs, the data in both directions is valid packet data.
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