Table of Contents
Paragraph
Number
Title
Page
Number
MOTOROLA
MC68302 USER’S MANUAL
xv
E.1.1.3.6
E.1.1.3.7
E.1.1.3.8
E.1.1.3.9
E.1.1.3.10
E.1.1.3.11
E.1.1.4
E.1.1.4.1
E.1.1.4.2
E.1.1.4.3
E.1.1.5
E.1.1.5.1
E.1.1.5.2
E.1.1.5.3
E.1.2
E.1.2.1
E.1.2.2
E.1.2.3
E.1.2.4
E.1.2.5
E.2
E.2.1
E.2.1.1
E.2.1.1.1
E.2.1.1.2
E.2.1.1.3
E.2.1.2
E.2.1.2.1
E.2.1.2.2
E.2.1.2.3
E.2.1.2.4
E.2.1.2.5
E.2.1.2.6
E.2.1.3
E.2.1.3.1
E.2.1.3.2
E.2.1.3.3
E.2.1.3.4
E.2.1.3.5
E.2.1.3.6
E.2.1.3.7
E.2.1.3.8
E.2.1.3.9
E.2.1.4
E.2.1.4.1
ABTSC—Abort Sequence Counter.......................................................E-10
NMARC—Nonmatching Address Received Counter. ...........................E-10
RETRC—Frame Retransmission Counter. ...........................................E-10
MFLR—Maximum Frame Length Register............................................E-10
HMASK—HDLC Frame Address Mask.................................................E-10
HADDR1, HADDR2, HADDR3, and HADDR4-HDLC Frame Address..E-10
Receive Buffer Descriptors....................................................................E-10
Receive BD Control/Status Word..........................................................E-11
Receive Buffer Data Length..................................................................E-12
Receive Buffer Pointer. .........................................................................E-12
Transmit Buffer Descriptors...................................................................E-12
Transmit BD Control/Status Word.........................................................E-12
Transmit Buffer Data Length.................................................................E-13
Transmit Buffer Pointer. ........................................................................E-13
Programming the SCC for HDLC..........................................................E-13
CP Initialization......................................................................................E-13
General and HDLC Protocol-Specific RAM Initialization.......................E-13
SCC Initialization...................................................................................E-14
SCC Operation......................................................................................E-14
SCC Interrupt Handling.........................................................................E-14
UART Programming Reference Section ...............................................E-15
UART Programming Model...................................................................E-15
Communications Processor (CP) Registers..........................................E-17
Command Register (CR).......................................................................E-17
Serial lnterface Mode Register (SlMODE).............................................E-18
Serial Interface Mask Register (SIMASK).............................................E-19
Per SCC Registers................................................................................E-19
Serial Configuration Register (SCON)...................................................E-19
SCC Mode Register (SCM)...................................................................E-20
SCC Data Synchronization Register (DSR)..........................................E-22
UART Event Register (SCCE)...............................................................E-22
UART Mask Register (SCCM)...............................................................E-23
UART Status Register (SCCS)..............................................................E-23
General and UART Protocol-specific Parameter RAM..........................E-23
RFCR/TFCR—Rx Function Code/Tx Function Code............................E-24
MRBLR—Maximum Rx Buffer Length...................................................E-24
MAX_IDL—Maximum IDLE Characters................................................E-24
BRKCR—Break Count Register............................................................E-24
PAREC—Receive Parity Error Counter. ...............................................E-24
FRMEC—Receive Framing Error Counter............................................E-24
NOSEC—Receive Noise Counter.........................................................E-24
BRKEC—Receive Break Condition Counter.........................................E-24
UADDR1 and UADDR2.........................................................................E-24
Receive Buffer Descriptors....................................................................E-25
Receive BD Control/Status Word..........................................................E-26