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參數(shù)資料
| 型號： | MC68307VFG |
| 廠商： | MOTOROLA INC |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 32-BIT, MICROCONTROLLER, PQFP100 |
| 封裝： | PLASTIC, QFP-100 |
| 文件頁數(shù)： | 5/34頁 |
| 文件大?。?/td> | 354K |
| 代理商： | MC68307VFG |
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MOTOROLA
MC68307 TECHNICAL INFORMATION
13
DUAL TIMER MODULE
The MC68307 includes two independent, identical, general-purpose timers. Each general-purpose timer block
contains a free-running 16-bit timer which can be used in various modes, to capture the timer value with an
external event, to trigger an external event or interrupt when the timer reaches a set value, or to count external
events. Each has an 8-bit prescaler to allow programmable clock input frequency derived from the system
clock (divided by 1 or by 16) or external count input. The output pins (one per timer) have a variety of program-
mable modes and the output signal can be an active-low pulse or a toggle of the current output. The features
of the 16-bit timer include:
Maximum period of 16 seconds (at 16.67 MHz)
60-ns resolution (at 16.67 MHz)
Programmable sources for the clock input, including external clock
Input capture capability with programmable trigger edge on input pins
Output compare with programmable mode for the output pins
Two timers externally cascadeable to form a 32-bit timer
Free-run and restart modes
Dual Timer Programming Model
Table 8 shows the programming model for the dual timer module. The FC (function code) column indicates
whether a register is restricted to supervisor access (S) or programmable to exist in either supervisor or user
space (S/U). The address column contains the offset from the base address (MBASE) contained in the SIM07
MBAR
.
Table 8. Dual Timer Module Registers
Address
FC
Register Name
MBASE+$120
S/U
Timer mode register 1 (TMR1)
MBASE+$122
S/U
Timer reference register 1 (TTR1)
MBASE+$124
S/U
Timer capture register 1 (TCR1)
MBASE+$126
S/U
Timer counter 1 (TCN1)
MBASE+$129
S/U
Do not access byte $128 Timer event register 1 (TER1)
MBASE+$130
S/U
Timer mode register 2 (TMR2)
MBASE+$132
S/U
Timer reference register 2 (TRR1)
MBASE+$134
S/U
Timer capture register 2 (TCR2)
MBASE+$136
S/U
Timer counter 2 (TCN2)
MBASE+$139
S/U
Do not access byte $138 Timer event register 2 (TER2)
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