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參數(shù)資料
| 型號： | MC68331CFC20B1 |
| 廠商： | MOTOROLA INC |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 32-BIT, 20 MHz, MICROCONTROLLER, PQFP132 |
| 封裝： | 0.950 X 0.950 INCH, 0.025 INCH PITCH, PLASTIC, QFP-132 |
| 文件頁數(shù)： | 55/90頁 |
| 文件大?。?/td> | 481K |
| 代理商： | MC68331CFC20B1 |
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MC68331
MOTOROLA
MC68331TS/D
59
MSTR — Master/Slave Mode Select
0 = QSPI is a slave device and only responds to externally generated serial data.
1 = QSPI is system master and can initiate transmission to external SPI devices.
MSTR configures the QSPI for either master or slave mode operation. This bit is cleared on reset and
may only be written by the CPU.
WOMQ — Wired-OR Mode for QSPI Pins
0 = Outputs have normal MOS drivers.
1 = Pins designated for output by DDRQS have open-drain drivers.
WOMQ allows the wired-OR function to be used on QSPI pins, regardless of whether they are used as
general-purpose outputs or as QSPI outputs. WOMQ affects the QSPI pins regardless of whether the
QSPI is enabled or disabled.
BITS — Bits Per Transfer
In master mode, when BITSE in a command is set, the BITS field determines the number of data bits
transferred. When BITSE is cleared, eight bits are transferred. Reserved values default to eight bits.
BITSE is not used in slave mode.
The following table shows the number of bits per transfer.
CPOL — Clock Polarity
0 = The inactive state value of SCK is logic level zero.
1 = The inactive state value of SCK is logic level one.
CPOL is used to determine the inactive state value of the serial clock (SCK). It is used with CPHA to
produce a desired clock/data relationship between master and slave devices.
CPHA — Clock Phase
0 = Data is captured on the leading edge of SCK and changed on the following edge of SCK.
1 = Data is changed on the leading edge of SCK and captured on the following edge of SCK.
CPHA determines which edge of SCK causes data to change and which edge causes data to be cap-
tured. CPHA is used with CPOL to produce a desired clock/data relationship between master and slave
devices. CPHA is set at reset.
BITS
Bits per Transfer
0000
16
0001
Reserved
0010
Reserved
0011
Reserved
0100
Reserved
0101
Reserved
0110
Reserved
0111
Reserved
1000
8
1001
9
1010
10
1011
11
1100
12
1101
13
1110
14
1111
15
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PDF描述 |
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| MC68331CPV20B1 | 32-BIT, 20 MHz, MICROCONTROLLER, PQFP144 |
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| MC68331CPV16B1 | 32-BIT, 16 MHz, MICROCONTROLLER, PQFP144 |
| MC68331CPV20 | 32-BIT, 20.97 MHz, MICROCONTROLLER, PQFP144 |
| MC68331CFC25 | 32-BIT, MICROCONTROLLER, PQFP132 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MC68331CFC25 | 制造商:Rochester Electronics LLC 功能描述: 制造商:Freescale Semiconductor 功能描述: |
| MC68331CFC25B1 | 制造商:Rochester Electronics LLC 功能描述: 制造商:Freescale Semiconductor 功能描述: |
| MC68331CFV16 | 制造商:MOTOROLA 制造商全稱:Motorola, Inc 功能描述:User’s Manual |
| MC68331CFV20 | 制造商:MOTOROLA 制造商全稱:Motorola, Inc 功能描述:User’s Manual |
| MC68331CPV16 | 功能描述:IC MCU 32BIT 16MHZ 144-LQFP RoHS:否 類別:集成電路 (IC) >> 嵌入式 - 微控制器， 系列:M683xx 其它有關(guān)文件:STM32F101T8 View All Specifications 特色產(chǎn)品:STM32 32-bit Cortex MCUs 標準包裝:490 系列:STM32 F1 核心處理器:ARM? Cortex?-M3 芯體尺寸:32-位 速度:36MHz 連通性:I²C，IrDA，LIN，SPI，UART/USART 外圍設(shè)備:DMA，PDR，POR，PVD，PWM，溫度傳感器，WDT 輸入/輸出數(shù):26 程序存儲器容量:64KB（64K x 8） 程序存儲器類型:閃存 EEPROM 大小:- RAM 容量:10K x 8 電壓 - 電源 (Vcc/Vdd):2 V ~ 3.6 V 數(shù)據(jù)轉(zhuǎn)換器:A/D 10x12b 振蕩器型:內(nèi)部 工作溫度:-40°C ~ 85°C 封裝/外殼:36-VFQFN，36-VFQFPN 包裝:托盤 配用:497-10030-ND - STARTER KIT FOR STM32497-8853-ND - BOARD DEMO STM32 UNIV USB-UUSCIKSDKSTM32-PL-ND - KIT IAR KICKSTART STM32 CORTEXM3497-8512-ND - KIT STARTER FOR STM32F10XE MCU497-8505-ND - KIT STARTER FOR STM32F10XE MCU497-8304-ND - KIT STM32 MOTOR DRIVER BLDC497-6438-ND - BOARD EVALUTION FOR STM32 512K497-6289-ND - KIT PERFORMANCE STICK FOR STM32MCBSTM32UME-ND - BOARD EVAL MCBSTM32 + ULINK-MEMCBSTM32U-ND - BOARD EVAL MCBSTM32 + ULINK2更多... 其它名稱:497-9032STM32F101T8U6-ND |
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