參數(shù)資料
型號(hào)： MC68332AMEH20
廠(chǎng)商： Freescale Semiconductor
文件頁(yè)數(shù)： 41/88頁(yè)
文件大小： 0K
描述： IC MCU 32BIT 20MHZ 132-PQFP
標(biāo)準(zhǔn)包裝： 36
系列： M683xx
核心處理器： CPU32
芯體尺寸： 32-位
速度： 20MHz
連通性： EBI/EMI，SCI，SPI，UART/USART
外圍設(shè)備： POR，PWM，WDT
輸入/輸出數(shù)： 15
程序存儲(chǔ)器類(lèi)型： ROMless
RAM 容量： 2K x 8
電壓 - 電源 (Vcc/Vdd)： 4.5 V ~ 5.5 V
振蕩器型： 內(nèi)部
工作溫度： -40°C ~ 125°C
封裝/外殼： 132-BQFP 緩沖式
包裝： 托盤(pán)
產(chǎn)品目錄頁(yè)面： 733 (CN2011-ZH PDF)
MOTOROLA
MC68332
46
MC68332TS/D
4.3 Status Register
The status register contains the condition codes that reflect the results of a previous operation and can
be used for conditional instruction execution in a program. The lower byte containing the condition
codes is the only portion of the register available at the user privilege level; it is referenced as the con-
dition code register (CCR) in user programs. At the supervisor privilege level, software can access the
full status register, including the interrupt priority mask and additional control bits.
System Byte
T[1:0] —Trace Enable
S —Supervisor/User State
Bits [12:11] —Unimplemented
IP[2:0] —Interrupt Priority Mask
User Byte (Condition Code Register)
Bits [7:5] — Unimplemented
X — Extend
N — Negative
Z — Zero
V — Overflow
C — Carry
4.4 Data Types
Six basic data types are supported:
Bits
Packed Binary Coded Decimal Digits
Byte Integers (8 bits)
Word Integers (16 bits)
Long-Word Integers (32 bits)
Quad-Word Integers (64 bits)
4.5 Addressing Modes
Addressing in the CPU32 is register-oriented. Most instructions allow the results of the specified oper-
ation to be placed either in a register or directly in memory. This flexibility eliminates the need for extra
instructions to store register contents in memory. The CPU32 supports seven basic addressing modes:
Register direct
Register indirect
Register indirect with index
Program counter indirect with displacement
Program counter indirect with index
Absolute
Immediate
Included in the register indirect addressing modes are the capabilities to post-increment, predecrement,
and offset. The program counter relative mode also has index and offset capabilities. In addition to
these addressing modes, many instructions implicitly specify the use of the status register, stack point-
er, or program counter.
SR —Status Register
15
14
13
12
11
10
8
7
6
5
4
3
2
1
0
T1
T0
S
0
IP
0
X
N
Z
V
C
RESET:
0
1
0
1
0
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Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
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