參數(shù)資料
型號(hào): MC68332AVPV25
廠商: FREESCALE SEMICONDUCTOR INC
元件分類: 微控制器/微處理器
英文描述: 32-BIT, 25 MHz, MICROCONTROLLER, PQFP144
封裝: 20 X 20 MM, 1.40 MM HEIGHT, 0.50 MM PITCH, LQFP-144
文件頁(yè)數(shù): 52/109頁(yè)
文件大?。?/td> 787K
代理商: MC68332AVPV25
MC68332
MOTOROLA
MC68332TS/D
47
4.6 Instruction Set Summary
Table 20 Instruction Set Summary
Instruction
Syntax
Operand Size
Operation
ABCD
Dn, Dn
(An), (An)
8
Source10 + Destination10 + X Destination
ADD
Dn, <ea>
<ea>, Dn
8, 16, 32
Source
+ Destination Destination
ADDA
<ea>, An
16, 32
Source
+ Destination Destination
ADDI
#<data>, <ea>
8, 16, 32
Immediate data
+ Destination Destination
ADDQ
# <data>, <ea>
8, 16, 32
Immediate data
+ Destination Destination
ADDX
Dn, Dn
(An), (An)
8, 16, 32
Source
+ Destination + X Destination
AND
<ea>, Dn
Dn, <ea>
8, 16, 32
Source
Destination Destination
ANDI
# <data>, <ea>
8, 16, 32
Data
Destination Destination
ANDI to CCR
# <data>, CCR
8
Source
CCR CCR
ANDI to SR11
# <data>, SR
16
Source
SR SR
ASL
Dn, Dn
# <data>, Dn
8, 16, 32
16
ASR
Dn, Dn
# <data>, Dn
8, 16, 32
16
Bcc
label
8, 16, 32
If condition true, then PC
+ d PC
BCHG
Dn, <ea>
# <data>, <ea>
8, 32
BCLR
Dn, <ea>
# <data>, <ea>
8, 32
0
bit of destination
BGND
none
If background mode enabled, then enter background
mode, else format/vector
(SSP);
PC
(SSP); SR (SSP); (vector) PC
BKPT
# <data>
none
If breakpoint cycle acknowledged, then execute
returned operation word, else trap as illegal instruction
BRA
label
8, 16, 32
PC
+ d PC
BSET
Dn, <ea>
# <data>, <ea>
8, 32
1
bit of destination
BSR
label
8, 16, 32
SP
4 SP; PC (SP); PC + d PC
BTST
Dn, <ea>
# <data>, <ea>
8, 32
CHK
<ea>, Dn
16, 32
If Dn < 0 or Dn > (ea), then CHK exception
CHK2
<ea>, Rn
8, 16, 32
If Rn < lower bound or Rn > upper bound, then
CHK exception
CLR
8, 16, 32
0
Destination
CMP
<ea>, Dn
8, 16, 32
(Destination
Source), CCR shows results
CMPA
<ea>, An
16, 32
(Destination
Source), CCR shows results
CMPI
# <data>, <ea>
8, 16, 32
(Destination
Data), CCR shows results
CMPM
(An)
+, (An) +
8, 16, 32
(Destination
Source), CCR shows results
CMP2
<ea>, Rn
8, 16, 32
Lower bound
≤ Rn ≤ Upper bound, CCR shows result
X/C
0
X/C
bit number
of destination)
Z
bit of destinatio
bit number
of destination
()
Z
bit number
of destination
()
Z;
bit number
of destination
()
Z
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Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
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