參數(shù)資料
型號: MC68332VFC16
廠商: MOTOROLA INC
元件分類: 微控制器/微處理器
英文描述: 32-Bit Modular Microcontroller
中文描述: 32-BIT, 16.78 MHz, MICROCONTROLLER, PQFP132
封裝: PLASTIC, QFP-132
文件頁數(shù): 30/88頁
文件大小: 446K
代理商: MC68332VFC16
MOTOROLA
30
MC68332
MC68332TS/D
Chip-select assertion can be synchronized with bus control signals to provide output enable, read/write
strobes, or interrupt acknowledge signals. Logic can also generate DSACK signals internally. A single
DSACK generator is shared by all circuits. Multiple chip selects assigned to the same address and con-
trol must have the same number of wait states.
Chip selects can also be synchronized with the ECLK signal available on ADDR23.
When a memory access occurs, chip-select logic compares address space type, address, type of ac-
cess, transfer size, and interrupt priority (in the case of interrupt acknowledge) to parameters stored in
chip-select registers. If all parameters match, the appropriate chip-select signal is asserted. Select sig-
nals are active low. Refer to the following block diagram of a single chip-select circuit.
Figure 9 Chip-Select Circuit Block Diagram
The following table lists allocation of chip-selects and discrete outputs on the pins of the MCU.
Pin
Chip Select
CSBOOT
CS0
CS1
CS2
CS3
CS4
CS5
CS6
CS7
CS8
CS9
CS10
Discrete Outputs
PC0
PC1
PC2
PC3
PC4
PC5
PC6
ECLK
CSBOOT
BR
BG
BGACK
FC0
FC1
FC2
ADDR19
ADDR20
ADDR21
ADDR22
ADDR23
CHIP SEL BLOCK
AVEC
GENERATOR
DSACK
GENERATOR
PIN
ASSIGNMENT
REGISTER
PIN
DATA
REGISTER
BASE ADDRESS REGISTER
TIMING
AND
CONTROL
ADDRESS COMPARATOR
OPTION COMPARE
OPTION REGISTER
AVEC
DSACK
PIN
BUS CONTROL
INTERNAL
SIGNALS
ADDRESS
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