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MC68340 USER’S MANUAL
MOTOROLA
If using internal request, select the amount of bus bandwidth to be used by the DMA
(BB field).
Clear the S/D bit for dual-address transfer.
Channel Status Register (CSR)
Clear the CSR by writing $7C into it. The DMA cannot be started until the DONE,
BES, BED, CONF, and BRKP bits are cleared.
Function Code Register (FCR)
Encode the source and destination function codes.
Address Registers (SAR and DAR)
Write the source and destination addresses.
Byte Transfer Counter (BTC)
Encode the number of bytes to be transferred.
Channel Control Register (CCR)
Write a one to the start bit (STR) to allow the transfer to begin.
6.9.2 DMA Channel Example Configuration Code
The following are examples of configuration sequences for a DMA channel in single- and
dual-addressing modes.
***************************************************************************
* MC68340 basic DMA channel register initialization example code.
* This code is used to initialize the 68340's internal DMA channel
* registers, providing basic functions for operation.
* The code sets up channel 1 for external burst request generation,
* single-address mode, long word size transfers.
* Control signals are asserted on the DMA read cycle.
***************************************************************************
Example 1: External Burst Request Generation, Single-Address Transfers.
***************************************************************************
* SIM40 equates
***************************************************************************
MBAR
EQU $0003FF00 Address of SIM40 Module Base Address Reg.
MODBASE
EQU $FFFFF000 SIM40 MBAR address value
***************************************************************************
* DMA Channel 1 equates
DMACH1
EQU $780
Offset from MBAR for channel 1 regs
DMAMCR1
EQU $0
MCR for channel 1
* Channel 1 register offsets from channel 1 base address