參數(shù)資料
型號: MC68B912B32FU8
廠商: MOTOROLA INC
元件分類: 微控制器/微處理器
英文描述: 16-Bit Microcontroller
中文描述: 16-BIT, FLASH, 8 MHz, MICROCONTROLLER, PQFP80
封裝: QFP-80
文件頁數(shù): 91/128頁
文件大?。?/td> 748K
代理商: MC68B912B32FU8
MC68HC912B32
MC68HC912B32TS/D
MOTOROLA
91
Figure 21 Serial Peripheral Interface Block Diagram
A clock phase control bit (CPHA) and a clock polarity control bit (CPOL) in the SP0CR1 register select
one of four possible clock formats to be used by the SPI system. The CPOL bit simply selects non-in-
verted or inverted clock. The CPHA bit is used to accommodate two fundamentally different protocols
by shifting the clock by one half cycle or no phase shift.
PIN
CONTROL
LOGIC
8-BIT SHIFT REGISTER
READ DATA BUFFER
SHIFT CONTROL LOGIC
CLOCK
LOGIC
SPI CONTROL
SP0SR SPI STATUS REGISTER
SP0DR SPI DATA REGISTER
S
W
M
DIVIDER
SELECT
SP0BR SPI BAUD RATE REGISTER
÷
2
÷
4
÷
8
÷
16
÷
32
÷
64
÷
128
÷
256
SPI
INTERRUPT
REQUEST
INTERNAL BUS
MCU P CLOCK
(SAME AS E RATE)
S
M
M
S
S
M
S
S
S
S
S
M
C
C
L
LSBF
P
R
S
S
S
SPE
CLOCK
MSTR
SWOM
MISO
PS4
SCK
PS6
SS
PS7
MOSI
PS5
HC12 SPI BLOCK
SP0CR1 SPI CONTROL REGISTER 1
SP0CR2 SPI CONTROL REGISTER 2
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