參數(shù)資料
型號: MC68C912B32CFU8
廠商: MOTOROLA INC
元件分類: 微控制器/微處理器
英文描述: 16-Bit Microcontroller
中文描述: 16-BIT, FLASH, 8 MHz, MICROCONTROLLER, PQFP80
封裝: QFP-80
文件頁數(shù): 122/128頁
文件大?。?/td> 748K
代理商: MC68C912B32CFU8
MOTOROLA
122
MC68HC912B32
MC68HC912B32TS/D
This register can be read or written by BDM commands or firmware.
ENBDM — Enable BDM (permit active background debug mode)
0 = BDM cannot be made active (hardware commands still allowed)
1 = BDM can be made active to allow firmware commands
BDMACT — Background Mode Active Status
0 = BDM not active
1 = BDM active and waiting for serial commands
ENTAG — Instruction Tagging Enable
Set by the TAGGO instruction and cleared when BDM is entered.
0 = Tagging not enabled, or BDM active
1 = Tagging active (BDM cannot process serial commands while tagging is active.)
SDV — Shifter Data Valid
Shows that valid data is in the serial interface shift register. Used by firmware-based instructions.
0 = No valid data
1 = Valid Data
TRACE — Asserted by the TRACE1 instruction
This 16-bit register contains data being received or transmitted via the serial interface.
This 16-bit register is temporary storage for BDM hardware and firmware commands.
This register preserves the content of the CPU12 CCR while BDM is active.
STATUS
— BDM Status Register
(BDM) $FF01
Bit 7
6
5
4
3
2
1
Bit 0
ENBDM
BDMACT
ENTAG
SDV
TRACE
0
0
0
RESET:
0
0
0
1
0
0
0
0
SHIFTER
— BDM Shift Register
(BDM) $FF02, $FF03
Bit 15
14
13
12
11
10
9
Bit 8
S15
S14
S13
S12
S11
S10
S9
S8
Bit 7
6
5
4
3
2
1
Bit 0
S7
S6
S5
S4
S3
S2
S1
S0
ADDRESS
— BDM Address Register
(BDM) $FF04, $FF05
Bit 15
14
13
12
11
10
9
Bit 8
A15
A14
A13
A12
A11
A10
A9
A8
Bit 7
6
5
4
3
2
1
Bit 0
A7
A6
A5
A4
A3
A2
A1
A0
CCRSAV
— BDM CCR Holding Register
(BDM) $FF06
Bit 7
6
5
4
3
2
1
Bit 0
CCR7
CCR6
CCR5
CCR4
CCR3
CCR2
CCR1
CCR0
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