參數(shù)資料
型號(hào): MC68HC05BD5
廠商: Motorola, Inc.
英文描述: 8-Bit Microcontroller Units (MCU).(8位微控制器)
中文描述: 8位微控制器單元(MCU)。(8位微控制器)
文件頁(yè)數(shù): 79/112頁(yè)
文件大小: 676K
代理商: MC68HC05BD5
MC68HC05BD3
MOTOROLA
9-7
CPU CORE AND INSTRUCTION SET
9
Table 9-5
Read/modify/write instructions
Addressing modes
Inherent
(A)
Inherent
(X)
Direct
Indexed
(no
offset)
Indexed
(8-bit
offset)
Function
M
INC
DEC
CLR
COM
NEG
ROL
ROR
LSL
LSR
ASR
TST
MUL
O
4C
4A
4F
43
40
49
46
48
44
47
4D
42
#
1
1
1
1
1
1
1
1
1
1
1
1
#
3
3
3
3
3
3
3
3
3
3
3
11
O
5C
5A
5F
53
50
59
56
58
54
57
5D
#
1
1
1
1
1
1
1
1
1
1
1
#
3
3
3
3
3
3
3
3
3
3
3
O
3C
3A
3F
33
30
39
36
38
34
37
3D
#
2
2
2
2
2
2
2
2
2
2
2
#
5
5
5
5
5
5
5
5
5
5
4
O
7C
7A
7F
73
70
79
76
78
74
77
7D
#
1
1
1
1
1
1
1
1
1
1
1
#
5
5
5
5
5
5
5
5
5
5
4
O
6C
6A
6F
63
60
69
66
68
64
67
6D
#
2
2
2
2
2
2
2
2
2
2
2
#
6
6
6
6
6
6
6
6
6
6
5
Increment
Decrement
Clear
Complement
Negate (two’s complement)
Rotate left through carry
Rotate right through carry
Logical shift left
Logical shift right
Arithmetic shift right
Test for negative or zero
Multiply
Table 9-6
Control instructions
Inherent addressing mode
Opcode
# Bytes # Cycles
97
1
9F
1
99
1
98
1
9B
1
9A
1
83
1
81
1
80
1
9C
1
9D
1
8E
1
8F
1
Function
Mnemonic
TAX
TXA
SEC
CLC
SEI
CLI
SWI
RTS
RTI
RSP
NOP
STOP
WAIT
Transfer A to X
Transfer X to A
Set carry bit
Clear carry bit
Set interrupt mask bit
Clear interrupt mask bit
Software interrupt
Return from subroutine
Return from interrupt
Reset stack pointer
No-operation
Stop
Wait
2
2
2
2
2
2
10
6
9
2
2
2
2
TPG
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