參數(shù)資料
型號(hào): MC68HC05C8AVN
廠商: MOTOROLA INC
元件分類: 微控制器/微處理器
英文描述: 8-BIT, MROM, 2.1 MHz, MICROCONTROLLER, PQCC44
封裝: PLASTIC, LCC-44
文件頁(yè)數(shù): 104/166頁(yè)
文件大?。?/td> 1914K
代理商: MC68HC05C8AVN
第1頁(yè)第2頁(yè)第3頁(yè)第4頁(yè)第5頁(yè)第6頁(yè)第7頁(yè)第8頁(yè)第9頁(yè)第10頁(yè)第11頁(yè)第12頁(yè)第13頁(yè)第14頁(yè)第15頁(yè)第16頁(yè)第17頁(yè)第18頁(yè)第19頁(yè)第20頁(yè)第21頁(yè)第22頁(yè)第23頁(yè)第24頁(yè)第25頁(yè)第26頁(yè)第27頁(yè)第28頁(yè)第29頁(yè)第30頁(yè)第31頁(yè)第32頁(yè)第33頁(yè)第34頁(yè)第35頁(yè)第36頁(yè)第37頁(yè)第38頁(yè)第39頁(yè)第40頁(yè)第41頁(yè)第42頁(yè)第43頁(yè)第44頁(yè)第45頁(yè)第46頁(yè)第47頁(yè)第48頁(yè)第49頁(yè)第50頁(yè)第51頁(yè)第52頁(yè)第53頁(yè)第54頁(yè)第55頁(yè)第56頁(yè)第57頁(yè)第58頁(yè)第59頁(yè)第60頁(yè)第61頁(yè)第62頁(yè)第63頁(yè)第64頁(yè)第65頁(yè)第66頁(yè)第67頁(yè)第68頁(yè)第69頁(yè)第70頁(yè)第71頁(yè)第72頁(yè)第73頁(yè)第74頁(yè)第75頁(yè)第76頁(yè)第77頁(yè)第78頁(yè)第79頁(yè)第80頁(yè)第81頁(yè)第82頁(yè)第83頁(yè)第84頁(yè)第85頁(yè)第86頁(yè)第87頁(yè)第88頁(yè)第89頁(yè)第90頁(yè)第91頁(yè)第92頁(yè)第93頁(yè)第94頁(yè)第95頁(yè)第96頁(yè)第97頁(yè)第98頁(yè)第99頁(yè)第100頁(yè)第101頁(yè)第102頁(yè)第103頁(yè)當(dāng)前第104頁(yè)第105頁(yè)第106頁(yè)第107頁(yè)第108頁(yè)第109頁(yè)第110頁(yè)第111頁(yè)第112頁(yè)第113頁(yè)第114頁(yè)第115頁(yè)第116頁(yè)第117頁(yè)第118頁(yè)第119頁(yè)第120頁(yè)第121頁(yè)第122頁(yè)第123頁(yè)第124頁(yè)第125頁(yè)第126頁(yè)第127頁(yè)第128頁(yè)第129頁(yè)第130頁(yè)第131頁(yè)第132頁(yè)第133頁(yè)第134頁(yè)第135頁(yè)第136頁(yè)第137頁(yè)第138頁(yè)第139頁(yè)第140頁(yè)第141頁(yè)第142頁(yè)第143頁(yè)第144頁(yè)第145頁(yè)第146頁(yè)第147頁(yè)第148頁(yè)第149頁(yè)第150頁(yè)第151頁(yè)第152頁(yè)第153頁(yè)第154頁(yè)第155頁(yè)第156頁(yè)第157頁(yè)第158頁(yè)第159頁(yè)第160頁(yè)第161頁(yè)第162頁(yè)第163頁(yè)第164頁(yè)第165頁(yè)第166頁(yè)
Interrupts
Technical Data
MC68HC05C8A MC68HCL05C8A MC68HSC05C8A — Rev. 5.0
42
Interrupts
MOTOROLA
Unlike reset, hardware interrupts do not cause the current instruction
execution to be halted, but they are considered pending until the current
instruction is complete.
NOTE:
The current instruction is the one already fetched and being operated on.
When the current instruction is complete, the processor checks all
pending hardware interrupts. If interrupts are not masked (CCR I bit
clear) and if the corresponding interrupt enable bit is set, the processor
proceeds with interrupt processing; otherwise, the next instruction is
fetched and executed.
If both an external interrupt and a timer interrupt are pending at the end
of an instruction execution, the external interrupt is serviced first. The
SWI is executed the same as any other instruction, regardless of the I-
bit state.
Vector addresses for all interrupts, including reset, are listed in
Table 4-1. Vector Addresses for Interrupts and Reset
Register Flag Name
Interrupts
CPU Interrupt
Vector Address
N/A
Reset
RESET
$1FFE–$1FFF
N/A
Software
SWI
$1FFC–$1FFD
N/A
External interrupt
IRQ
$1FFA–$1FFB
TSR
ICF
Timer input capture
TIMER
$1FF8–$1FF9
TSR
OCF
Timer output compare
TIMER
$1FF8–$1FF9
TSR
TOF
Timer overflow
TIMER
$1FF8–$1FF9
SCSR
TDRE
Transmit buffer empty
SCI
$1FF6–$1FF7
SCSR
TC
Transmit complete
SCI
$1FF6–$1FF7
SCSR
RDRF
Receiver buffer full
SCI
$1FF6–$1FF7
SCSR
IDLE
Idle line detect
SCI
$1FF6–$1FF7
SCSR
OR
Overrun
SCI
$1FF6–$1FF7
SPSR
SPIF
Transfer complete
SPI
$1FF4–$1FF5
SPSR
MODF
Mode fault
SPI
$1FF4–$1FF5
相關(guān)PDF資料
PDF描述
MC68HCL05C8AB 8-BIT, MROM, 2.1 MHz, MICROCONTROLLER, PDIP42
MC68HSC05C8CFB 8-BIT, MROM, 4.1 MHz, MICROCONTROLLER, PQFP44
MC68HC05C8AMB 8-BIT, MROM, 2.1 MHz, MICROCONTROLLER, PDIP42
MC68HSC05C8AB 8-BIT, MROM, 4.1 MHz, MICROCONTROLLER, PDIP42
MC68HC05C8CFN 8-BIT, MROM, 2.1 MHz, MICROCONTROLLER, PQCC44
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
MC68HC05C9 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:TECHNICAL DATA
MC68HC05C9A 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:Microcontrollers
MC68HC05C9AB 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:Microcontrollers
MC68HC05C9AFB 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:Microcontrollers
MC68HC05C9AFN 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:Microcontrollers