參數(shù)資料
型號(hào)： MC68HC05E1P
廠商： FREESCALE SEMICONDUCTOR INC
元件分類： 微控制器/微處理器
英文描述： 8-BIT, MROM, 2.1 MHz, MICROCONTROLLER, PDIP28
封裝： PLASTIC, DIP-28
文件頁數(shù)： 57/86頁
文件大?。?/td> 709K
代理商： MC68HC05E1P
General Release Specication
MC68HC05E1 — Revision 2.0
60
Timer, Phase-Locked Loop, and Custom Periodic Interrupt
MOTOROLA
Timer, Phase-Locked Loop, and Custom Periodic
6.3.1 Timer Control and Status Register (TCSR) $08
The TCSR contains the timer interrupt flag, the timer interrupt enable
bits, and the real time interrupt rate select bits. Figure 6-2 shows the
value of each bit in the TCSR when coming out of reset.
Figure 6-2. Timer Control and Status Register (TCSR)
TOF — Timer Over Flow
TOF is a clearable, read-only status bit and is set when the 8-bit ripple
counter rolls over from $FF to $00. A CPU interrupt request will be
generated if TOFE is set. Clearing the TOF is done by writing a ’0’ to
it. Writing a ’1’ to TOF has no effect on the bit’s value. Reset clears
TOF.
RTIF — Real Time Interrupt Flag
The Real Time Interrupt circuit consists of a three stage divider and a
1 of 4 selector. The clock frequency that drives the RTI circuit is
fop/2
13 (or f
op/8192) with three additional divider stages giving a
maximum interrupt period of 4 seconds at a crystal frequency of
32.768 kHz. RTIF is a clearable, read-only status bit and is set when
the output of the chosen (1 of 4 selection) stage goes active. A CPU
interrupt request will be generated if RTIE is set. Clearing the RTIF is
done by writing a ’0’ to it. Writing a ’1’ to RTIF has no effect on this bit.
Reset clears RTIF.
TOFE — Timer Over Flow Enable
When this bit is set, a CPU interrupt request is generated when the
TOF bit is set. Reset clears this bit.
TOF
TOFE
RTIE
0
RT1
RT0
RTIF
$08
0
000011
0
RESET:
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Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
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