參數(shù)資料
型號(hào): MC68HC05K0CP
廠商: FREESCALE SEMICONDUCTOR INC
元件分類: 微控制器/微處理器
英文描述: 8-BIT, MROM, 2 MHz, MICROCONTROLLER, PDIP16
封裝: PLASTIC, DIP-16
文件頁數(shù): 121/154頁
文件大小: 1585K
代理商: MC68HC05K0CP
Parallel Input/Output (I/O)
Port A
MC68HC05K0 MC68HC05K1 — Rev. 2.0
Technical Data
Parallel Input/Output (I/O)
7.3.4 Port A External Interrupts
If the mask option for port A external interrupts is selected, the PA3–PA0
pins serve as external interrupt pins in addition to the IRQ/VPP pin.
External interrupts can be positive edge-triggered or positive edge- and
high level-triggered.
NOTE:
When testing for external interrupts, the BIH and BIL instructions test the
voltage on the IRQ/VPP pin, not the state of the internal IRQ signal.
Therefore, BIH and BIL do not test the port A external interrupt pins.
Port A interrupts are not sensitive to the direction of the port pins. Driving
a logic 1 on PA0–PA3 while port interrupts are enabled will cause an
interrupt, even if PA0–PA3 are set to outputs.
7.3.5 Port A Logic
Figure 7-4 shows the port A I/O logic.
Figure 7-4. Port A I/O Circuit
PAx
EXTERNAL
INTERRUPT
REQUEST
DATA DIRECTION
REGISTER A
BIT DDRAx
PORT A DATA
REGISTER
BIT PAx
PULLDOWN
REGISTER A
BIT PDIAx
READ $0004
WRITE $0000
READ $0000
WRITE $0010
100-mA
PULLDOWN
DEVICE
RESET
INTERNAL
D
AT
A
B
US
8-mA SINK
CAPABILITY
(PINS PA7–PA4)
(PINS PA3–PA0)
WRITE $0004
PULLDOWNS ENABLED (ACTIVE LOW)
(MASK OPTION)
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Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
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