參數(shù)資料
型號： MC68HC05K1DW
廠商： MOTOROLA INC
元件分類： 微控制器/微處理器
英文描述： 8-BIT, MROM, 2 MHz, MICROCONTROLLER, PDSO16
封裝： SOIC-16
文件頁數(shù)： 128/154頁
文件大?。?/td> 1544K
代理商： MC68HC05K1DW
Parallel Input/Output (I/O)
Port B
MC68HC05K0 MC68HC05K1 — Rev. 2.0
Technical Data
MOTOROLA
Parallel Input/Output (I/O)
75
When a port B pin is programmed as an output, reading the port bit reads
the value of the data latch and not the voltage on the pin itself. When a
port B pin is programmed as an input, reading the port bit reads the
voltage level on the pin. The data latch can always be written, regardless
of the state of its DDR bit. Table 7-2 and Table 7-3 summarize the
operation of the port B pins.
Table 7-2. PB0 Pin Functions
Pulldown
Mask
Option
Control Bits
PB0
Pin Mode
Accesses
to PDRB
Accesses
to DDRB
Accesses
to PORTB
PDIB0
DDRB0
Read
Write
Read/Write
Read
Write
No
X
0
Input, hi-z
U
PDIB0
DDRB0
Pin
PB0
No
X
1
Output
U
PDIB0
DDRB0
PB0
Yes
0
Input,
pulldown on
U
PDIB0
DDRB0
Pin
PB0
Yes
0
1
Output
U
PDIB0
DDRB0
PB0
Yes
1
0
Input, hi-z
U
PDIB0
DDRB0
Pin
PB0
Yes
1
Output
U
PDIB0
DDRB0
PB0
X = Don’t care
U = Unde
ned
Table 7-3. PB1/OSC3 Pin Functions
Mask Options
Control Bits
PB1/OSC3
Pin Mode
Accesses
to PDRB
Accesses
to DDRB
Accesses
to PORTB
3-Pin Osc.
Pulldowns
PDIB1
DDRB1
Read
Write
Read/Write
Read
Write
No
X
0
Input, hi-z
U
PDIB1
DDRB1
Pin
PB1
No
X
1
Output
U
PDIB1
DDRB1
PB1
No
Yes
0
Input,
pulldown on
U
PDIB1
DDRB1
Pin
PB1
No
Yes
0
1
Output
U
PDIB1
DDRB1
PB1
No
Yes
1
0
Input, hi-z
U
PDIB1
DDRB1
Pin
PB1
No
Yes
1
Output
U
PDIB1
DDRB1
PB1
X = Don’t care
U = Unde
ned
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