
MOTOROLA
4-4
CENTRAL PROCESSOR UNIT
MC68HC705J2
Rev. 2
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4.1.5.4 Zero Flag
The CPU sets the zero flag when an arithmetic operation, logical operation, or data
manipulation produces a $00.
4.1.5.5 Carry/Borrow Flag
The CPU sets the carry/borrow flag when an addition operation produces a carry
out of bit 7 of the accumulator. Some logical operations and data manipulation
instructions also clear or set the carry/borrow flag.
4.2 Arithmetic/Logic Unit (ALU)
The ALU performs the arithmetic and logical operations defined by the instruction
set.
The binary arithmetic circuits decode instructions and set up the ALU for the
selected operation. Most binary arithmetic is based on the addition algorithm,
carrying out subtraction as negative addition. Multiplication is not performed as a
discrete operation but as a chain of addition and shift operations within the ALU.
The multiply instruction (MUL) requires 11 internal processor cycles to complete
this chain of operations.
4.3 Low-Power Modes
The following paragraphs describe the STOP and WAIT modes. (Refer also to
6.2
Data Retention Mode
.)
4.3.1 STOP Mode
The STOP instruction puts the MCU in its lowest power-consumption mode. In
STOP mode, the following events occur:
The CPU clears TOF and RTIF, the timer interrupt flags in the timer control
and status register, removing any pending timer interrupts.
The CPU clears TOIE and RTIE, the timer interrupt enable bits in the timer
control and status register, disabling further timer interrupts.
The CPU clears the divide-by-four timer prescaler.
The CPU clears the interrupt mask in the condition code register, enabling
external interrupts.
The internal oscillator stops, halting all internal processing, including
operation of the timer and the COP timer.
The STOP instruction does not affect any other registers or any I/O lines.