參數(shù)資料
型號: MC68HC05P9AVP
廠商: 飛思卡爾半導體(中國)有限公司
英文描述: HCMOS Microcontroller Unit
中文描述: HCMOS微控制器
文件頁數(shù): 112/158頁
文件大?。?/td> 1106K
代理商: MC68HC05P9AVP
SIOP
112
SIOP
MOTOROLA
I/O Registers
The following registers control and monitor SIOP operation:
SIOP control register (SCR)
SIOP status register (SSR)
SIOP data register (SDR)
SIOP Control
Register
The read/write SIOP control register (SCR) contains two bits. One bit
enables the SIOP, and the other configures the SIOP for master mode
or for slave mode.
SPE — SIOP Enable
This read/write bit enables the SIOP. Setting SPE initializes the data
direction register as follows:
The PB6/SDI pin is an input.
The PB5/SDO pin is an output.
The PB7/SCK pin is an input in slave mode and an output in
master mode.
Clearing SPE disables the SIOP and returns the port to its normal I/O
functions. The data direction register and the port data register remain
in their SIOP-initialized state.
NOTE:
After clearing SPE, be sure to initialize the port for its intended I/O use.
$000A
Bit 7
6
5
4
3
2
1
Bit 0
Read:
0
SPE
0
MSTR
0
0
0
0
Write:
Reset:
0
0
0
0
0
0
0
0
= Unimplemented
Figure 64. SIOP Control Register (SCR)
14-mc68hc05p9a
F
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
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