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| 型號(hào)： | MC68HC08AS32AFN |
| 廠商： | MOTOROLA INC |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | Microcontrollers |
| 中文描述： | 8-BIT, MROM, 8.4 MHz, MICROCONTROLLER, PQCC52 |
| 封裝： | PLASTIC, LCC-52 |
| 文件頁(yè)數(shù)： | 244/296頁(yè) |
| 文件大?。?/td> | 2291K |
| 代理商： | MC68HC08AS32AFN |
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Timer Interface (TIM)
Data Sheet
MC68HC08AS32A — Rev. 1
244
Timer Interface (TIM)
MOTOROLA
16.3.1 TIM Counter Prescaler
The TIM clock source can be one of the seven prescaler outputs or the TIM clock
pin, PTD6/ATD14/TCLK. The prescaler generates seven clock rates from the
internal bus clock. The prescaler select bits, PS[2–0], in the TIM status and control
register select the TIM clock source.
16.3.2 Input Capture
An input capture function has three basic parts: edge select logic, an input capture
latch, and a 16-bit counter. Two 8-bit registers, which make up the 16-bit input
capture register, are used to latch the value of the free-running counter after the
corresponding input capture edge detector senses a defined transition. The
polarity of the active edge is programmable. The level transition which triggers the
counter transfer is defined by the corresponding input edge bits (ELSxB and
ELSxA in TSC0 through TSC5 control registers with x referring to the active
channel number). When an active edge occurs on the pin of an input capture
channel, the TIM latches the contents of the TIM counter into the TIM channel
registers, TCHxH–TCHxL. Input captures can generate TIM CPU interrupt
requests. Software can determine that an input capture event has occurred by
enabling input capture interrupts or by polling the status flag bit.
The free-running counter contents are transferred to the TIM channel registers
(TCHxH–TCHxL) (see
16.8.5 TIM Channel Registers
) on each proper signal
transition regardless of whether the TIM channel flag (CH0F–CH5F in TSC0–TSC5
registers) is set or clear. When the status flag is set, a CPU interrupt is generated
if enabled. The value of the count latched or “captured” is the time of the event.
Because this value is stored in the input capture register when the actual event
occurs, user software can respond to this event at a later time and determine the
actual time of the event. However, this must be done prior to another input capture
on the same pin; otherwise, the previous time value will be lost.
By recording the times for successive edges on an incoming signal, software can
determine the period and/or pulse width of the signal. To measure a period, two
successive edges of the same polarity are captured. To measure a pulse width, two
alternate polarity edges are captured. Software should track the overflows at the
16-bit module counter to extend its range.
Another use for the input capture function is to establish a time reference. In this
case, an input capture function is used in conjunction with an output compare
function. For example, to activate an output signal a specified number of clock
cycles after detecting an input event (edge), use the input capture function to
record the time at which the edge occurred. A number corresponding to the desired
delay is added to this captured value and stored to an output compare register (see
16.8.5 TIM Channel Registers
). Because both input captures and output
compares are referenced to the same 16-bit modulo counter, the delay can be
controlled to the resolution of the counter independent of software latencies.
F
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
n
.
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