參數(shù)資料
型號(hào): MC68HC11D3CFB1
廠商: ABILIS SYSTEMS
元件分類: 微控制器/微處理器
英文描述: 8-BIT, OTPROM, 1 MHz, MICROCONTROLLER, PQFP44
封裝: 10 X 10 MM, QFP-44
文件頁數(shù): 108/124頁
文件大?。?/td> 6875K
代理商: MC68HC11D3CFB1
SERIAL PERIPHERAL INTERFACE
8-6
TECHNICAL DATA
8.5.1 Serial Peripheral Control
SPIE — Serial Peripheral Interrupt Enable
0 = SPI interrupt disabled
1 = SPI interrupt enabled
SPE — Serial Peripheral System Enable
0 = SPI off
1 = SPI on
DWOM — Port D Wired-OR Mode
DWOM affects all six port D pins.
0 = Normal CMOS outputs
1 = Open-drain outputs
MSTR — Master Mode Select
0 = Slave mode
1 = Master mode
CPOL — Clock Polarity
When the clock polarity bit is cleared and data is not being transferred, the SCK pin of
the master device has a steady state low value. When CPOL is set, SCK idles high.
CPHA — Clock Phase
The clock phase bit, in conjunction with the CPOL bit, controls the clock-data relation-
ship between master and slave. The CPHA bit selects one of two different clocking
SPR1 and SPR0 — SPI Clock Rate Selects
These two serial peripheral rate bits select one of four baud rates to be used as SCK
if the device is a master; however, they have no effect in the slave mode.
SPCR — Serial Peripheral Control Register
$0028
Bit 7
654321
Bit 0
SPIE
SPE
DWOM
MSTR
CPOL
CPHA
SPR1
SPR0
RESET:
000001
U
SPR[1:0]
E Clock
Divide By
Frequency at
E = 2 MHz (Baud)
0 0
2
1.0 MHz
0 1
4
500 kHz
1 0
16
125 kHz
1 1
32
62.5 kHz
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Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
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