- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄201871 > MC68HC11D3CFN3 (FREESCALE SEMICONDUCTOR INC) 8-BIT, MROM, 3 MHz, MICROCONTROLLER, PQCC44 PDF資料下載
參數(shù)資料
| 型號(hào)： | MC68HC11D3CFN3 |
| 廠商： | FREESCALE SEMICONDUCTOR INC |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 8-BIT, MROM, 3 MHz, MICROCONTROLLER, PQCC44 |
| 封裝： | PLASTIC, LCC-44 |
| 文件頁(yè)數(shù)： | 86/138頁(yè) |
| 文件大?。?/td> | 1047K |
| 代理商： | MC68HC11D3CFN3 |
第1頁(yè)第2頁(yè)第3頁(yè)第4頁(yè)第5頁(yè)第6頁(yè)第7頁(yè)第8頁(yè)第9頁(yè)第10頁(yè)第11頁(yè)第12頁(yè)第13頁(yè)第14頁(yè)第15頁(yè)第16頁(yè)第17頁(yè)第18頁(yè)第19頁(yè)第20頁(yè)第21頁(yè)第22頁(yè)第23頁(yè)第24頁(yè)第25頁(yè)第26頁(yè)第27頁(yè)第28頁(yè)第29頁(yè)第30頁(yè)第31頁(yè)第32頁(yè)第33頁(yè)第34頁(yè)第35頁(yè)第36頁(yè)第37頁(yè)第38頁(yè)第39頁(yè)第40頁(yè)第41頁(yè)第42頁(yè)第43頁(yè)第44頁(yè)第45頁(yè)第46頁(yè)第47頁(yè)第48頁(yè)第49頁(yè)第50頁(yè)第51頁(yè)第52頁(yè)第53頁(yè)第54頁(yè)第55頁(yè)第56頁(yè)第57頁(yè)第58頁(yè)第59頁(yè)第60頁(yè)第61頁(yè)第62頁(yè)第63頁(yè)第64頁(yè)第65頁(yè)第66頁(yè)第67頁(yè)第68頁(yè)第69頁(yè)第70頁(yè)第71頁(yè)第72頁(yè)第73頁(yè)第74頁(yè)第75頁(yè)第76頁(yè)第77頁(yè)第78頁(yè)第79頁(yè)第80頁(yè)第81頁(yè)第82頁(yè)第83頁(yè)第84頁(yè)第85頁(yè)當(dāng)前第86頁(yè)第87頁(yè)第88頁(yè)第89頁(yè)第90頁(yè)第91頁(yè)第92頁(yè)第93頁(yè)第94頁(yè)第95頁(yè)第96頁(yè)第97頁(yè)第98頁(yè)第99頁(yè)第100頁(yè)第101頁(yè)第102頁(yè)第103頁(yè)第104頁(yè)第105頁(yè)第106頁(yè)第107頁(yè)第108頁(yè)第109頁(yè)第110頁(yè)第111頁(yè)第112頁(yè)第113頁(yè)第114頁(yè)第115頁(yè)第116頁(yè)第117頁(yè)第118頁(yè)第119頁(yè)第120頁(yè)第121頁(yè)第122頁(yè)第123頁(yè)第124頁(yè)第125頁(yè)第126頁(yè)第127頁(yè)第128頁(yè)第129頁(yè)第130頁(yè)第131頁(yè)第132頁(yè)第133頁(yè)第134頁(yè)第135頁(yè)第136頁(yè)第137頁(yè)第138頁(yè)
Interrupts
MC68HC711D3 Data Sheet, Rev. 2.1
Freescale Semiconductor
51
Figure 4-3. Interrupt Stacking Order
4.3.1 Software Interrupt (SWI)
The SWI is executed the same as any other instruction and takes precedence over interrupts only if the
other interrupts are masked (with I and X bits in the CCR set). SWI execution is similar to that of the
maskable interrupts in that it sets the I bit, stacks the central processor unit (CPU) registers, etc.
NOTE
The SWI instruction cannot be executed as long as another interrupt is
pending. However, once the SWI instruction has begun, no other interrupt
can be honored until the first instruction in the SWI service routine is
completed.
4.3.2 Illegal Opcode Trap
Since not all possible opcodes or opcode sequences are defined, an illegal opcode detection circuit has
been included in the MCU. When an illegal opcode is detected, an interrupt is required to the illegal
opcode vector. The illegal opcode vector should never be left uninitialized.
4.3.3 Real-Time Interrupt (RTI)
The real-time interrupt (RTI) provides a programmable periodic interrupt. This interrupt is maskable by
either the I bit in the CCR or the RTI enable (RTII) bit of the timer interrupt mask register 2 (TMSK2). The
rate is based on the MCU E clock and is software selectable to the E
÷ 213, E ÷ 214, E ÷ 215, or E ÷ 216.
See PACTL, TMSK2, and TFLG2 register descriptions in Chapter 8 Programmable Timer for control and
status bit information.
4.3.4 Interrupt Mask Bits in the CCR
Upon reset, both the X bit and I bit of the CCR are set to inhibit all maskable interrupts and XIRQ. After
minimum system initialization, software may clear the X bit by a TAP instruction, thus enabling XIRQ
interrupts. Thereafter software cannot set the X bit. So, an XIRQ interrupt is effectively a non-maskable
interrupt. Since the operation of the I bit related interrupt structure has no effect on the X bit, the internal
XIRQ pin remains effectively non-masked. In the interrupt priority logic, the XIRQ interrupt is a higher
priority than any source that is maskable by the I bit. All I bit related interrupts operate normally with their
own priority relationship.
STACK
SP
PCL
— SP BEFORE INTERRUPT
SP – 1
PCH
SP – 2
IYL
SP – 3
IYH
SP –
4IXL
SP –
5IXH
SP –
6ACCA
SP –
7ACCB
SP –
8CCR
SP –
9
— SP AFTER INTERRUPT
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| MC68HC08JB1DW | 8-BIT, MROM, 3 MHz, MICROCONTROLLER, PDSO20 |
| MC68HC08JB1P | 8-BIT, MROM, 3 MHz, MICROCONTROLLER, PDIP20 |
| MC68HC912BL16FU8 | 16-BIT, FLASH, 8 MHz, MICROCONTROLLER, PQFP64 |
| MC68HC912BL16VFU8 | 16-BIT, FLASH, 8 MHz, MICROCONTROLLER, PQFP64 |
| MK74CG117AFT | 90 MHz, OTHER CLOCK GENERATOR, PDSO48 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MC68HC11D3CFN4 | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:ROM-based high-performance microcontrollers |
| MC68HC11D3CFU | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:ROM-based high-performance microcontrollers |
| MC68HC11D3CFU1 | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:ROM-based high-performance microcontrollers |
| MC68HC11D3CFU3 | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:ROM-based high-performance microcontrollers |
| MC68HC11D3CFU4 | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:ROM-based high-performance microcontrollers |
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。