參數(shù)資料
型號： MC68HC11F1CFN2
廠商： FREESCALE SEMICONDUCTOR INC
元件分類： 微控制器/微處理器
英文描述： 8-BIT, EEPROM, 2 MHz, MICROCONTROLLER, PQCC68
封裝： PLASTIC, LCC-68
文件頁數(shù)： 144/162頁
文件大?。?/td> 4554K
代理商： MC68HC11F1CFN2
PARALLEL INPUT/OUTPUT
MC68HC11F1
6-2
TECHNICAL DATA
DDA[7:0] — Data Direction for Port A
0 = Input
1 = Output
NOTE
To enable PA3 as fourth input capture, set the I4/O5 bit in the PACTL
register. Otherwise, PA3 is configured as a fifth output compare out
of reset, with bit I4/O5 being cleared. If the DDA3 bit is set (configur-
ing PA3 as an output), and IC4 is enabled, writes to PA3 cause edges
on the pin to result in input captures. Writing to TI4/O5 has no effect
when the TI4/O5 register is acting as IC4. PA7 drives the pulse ac-
cumulator input but also can be configured for general-purpose I/O,
or output compare. Note that even when PA7 is configured as an out-
put, the pin still drives the pulse accumulator input.
6.2 Port B
Reset state is mode dependent. In single-chip or bootstrap modes, port B pins are
general-purpose outputs. In expanded and test modes, port B pins are high-order ad-
dress outputs and PORTB is not in the memory map.
6.3 Port C
Reset state is mode dependent. In single-chip and bootstrap modes, port C pins are
high-impedance inputs. It is customary to have an external pull-up resistor on lines that
are driven by open-drain devices. In expanded or test modes, port C pins are data bus
inputs/outputs and PORTC is not in the memory map. The R/W signal is used to con-
trol the direction of data transfers.
The CWOM control bit in the OPT2 register disables port C's P-channel output drivers.
Because the N-channel driver is not affected by CWOM, setting CWOM causes port
C to become an open-drain-type output port suitable for wired-OR operation. In wired-
OR mode, (PORTC bits are at logic level zero), pins are actively driven low by the N-
channel driver. When a port C bit is at logic level one, the associated pin is in a high-
DDRA — Data Direction Register for Port A
$1001
Bit 7
654321
Bit 0
DDA7
DDA6
DDA5
DDA4
DDA3
DDA2
DDA1
DDA0
RESET:
0000000
0
PORTB — Port B Data
$1004
Bit 7
654321
Bit 0
PB7
PB6
PB5
PB4
PB3
PB2
PB1
PB0
S. Chip or
Boot:
PB7
PB6
PB5
PB4
PB3
PB2
PB1
PB0
RESET:
0000000
0
Expan. or
Test:
ADDR15
ADDR14
ADDR13
ADDR12
ADDR11
ADDR10
ADDR9
ADDR8
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Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
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相關(guān)PDF資料
PDF描述
MC68HC11F1VFN2 8-BIT, EEPROM, 2 MHz, MICROCONTROLLER, PQCC68
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