參數(shù)資料
型號(hào): MC68HC11G5CFN
廠商: ABILIS SYSTEMS
元件分類: 微控制器/微處理器
英文描述: 8-BIT, MROM, 2.1 MHz, MICROCONTROLLER, PQCC84
封裝: PLASTIC, LCC-84
文件頁(yè)數(shù): 20/195頁(yè)
文件大?。?/td> 3620K
代理商: MC68HC11G5CFN
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ANALOG-TO-DIGITAL CONVERTER
9-4
9.3.3
8-Conversion, Single Scan
The result of the first conversion will be placed in result register ADR1, while the result of the
eighth conversion will be placed in result register ADR8. After the eighth conversion is complete all
conversion activity is halted until a new conversion command is written to the ADCTL control register.
9.3.4
8-Conversion, Continuous Scan
Conversions continue to be performed on the selected channel with the ninth conversion being
stored in the ADR1 register (overwriting the first conversion result), the tenth conversion overwrites
ADR2, the eleventh overwrites ADR3, and so on continuously. Using this variation, the data in any
result register is at most eight conversion times old.
9.4
MULTIPLE CHANNEL OPERATION
Multiple channel operation is selected by writing a one to the MULT bit in the A/D control and status
register (ADCTL). This mode has four variations, which can be selected using the CONV8 and
SCAN bits in the ADCTL register In the first two variations, the CONV8 bit is clear; and either Port
E bits 0 – 3 or Port E bits 4 – 7 are selected. (In this multiple channel mode, only the two most
significant bits of the channel address (CD and CC) are decoded.) In the second two variations, the
CONV8 bit is set and all eight channels are converted. The state of the SCAN bit determines whether
continuous or single scanning is selected.
9.4.1
4-Channel Single Scan
Either Port E bits 0 – 3 are selected or Port E bits 4 – 7 are selected. The first result is stored in the
ADR5 result register and the fourth result is stored in the ADR8 register. After the fourth conversion
is complete, all conversion activity is halted until a new conversion command is written to the ADCTL
control register.
9.4.2
4-Channel Continuous Scan
Conversions continue to be performed on the selected group of channels with the fifth conversion
being stored in the ADR5 register (replacing the earlier conversion result for the first channel in the
group), the sixth conversion overwrites ADR6, the seventh overwrites ADR7, and so on, continuously.
Using this second variation the data in any result register is, at most, four conversion times old.
9.4.3
8-Channel Single Scan
When CONV8 is set and MULT is set, all eight channels are converted. Each of the channels is
converted and the result is placed in a separate result register. Port E bit 0 uses result register ADR1,
Port E bit 1 uses result register ADR2 and so on. Each channel is converted once, then all conversion
activity is halted until a new conversion command is written to the ADCTL control register.
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Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
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