參數(shù)資料
型號(hào): MC68HC11K0VFN2
廠商: MOTOROLA INC
元件分類: 微控制器/微處理器
英文描述: 8-BIT MICROCONTROLLER
中文描述: 8-BIT, MROM, 2 MHz, MICROCONTROLLER, PQCC84
封裝: PLASTIC, LCC-84
文件頁(yè)數(shù): 14/80頁(yè)
文件大?。?/td> 420K
代理商: MC68HC11K0VFN2
MOTOROLA
14
M68HC11 K Series
MC6HC11KTS/D
3 On-Chip Memory
In general, K-series MCUs have 768 bytes RAM, 640 bytes EEPROM, and 24 Kbytes ROM/EPROM.
Some devices in the series have portions of their memory resources disabled. Some have ROM and
some have EPROM replacing ROM. The following paragraphs describe the memory systems of devices
in the series.
3.1 Memory Map and Register Block
The INIT, INIT2, and CONFIG registers control the presence and location of the registers, RAM, EE-
PROM, and ROM/EPROM in the 64 Kbyte CPU address space. The 128-byte register block originates
at $0000 after reset and can be placed at any 4 Kbyte boundary ($x000) after reset by writing an ap-
propriate value to the INIT register. Refer to
Figure 4
.
Figure 4 Memory Map
EXPANDED
24 KBYTES ROM/EPROM
(CAN BE REMAPPED TO $2000–$7FFF OR
$A000–$FFFF BY THE CONFIG REGISTER)
FFC0
FFFF
NORMAL MODE
INTERRUPT
VECTORS
128-BYTE REGISTER BLOCK
(CAN BE REMAPPED TO ANY
4K PAGE BY THE INIT REGISTER)
768 BYTES RAM
(CAN BE REMAPPED TO ANY
4K PAGE BY THE INIT REGISTER)
SINGLE
CHIP
BOOTSTRAP
SPECIAL
TEST
EXT
EXT
EXT
$0000
$1000
$A000
$FFFF
x000
x07F
x080
xD80
xFFF
A000
FFFF
BFC0
BFFF
SPECIAL MODE
INTERRUPT
VECTORS
EXT
BOOT ROM
(ONLY PRESENT IN
BOOTSTRAP MODE)
BE00
x37F
640 BYTES EEPROM
(CAN BE REMAPPED TO ANY
4K PAGE BY THE INIT2 REGISTER)
RESERVED (SPECIAL TEST MODE ONLY)
xD7F
xD00
NOTE: ROM/EPROM can be enabled in special test mode by setting ROMON bit in the config register after reset.
相關(guān)PDF資料
PDF描述
MC68HC11K0VFN3 8-BIT MICROCONTROLLER
MC68HC11K0VFN4 8-BIT MICROCONTROLLER
MC68HC11K0VFU2 8-BIT MICROCONTROLLER
MC68HC11K0VFU3 8-BIT MICROCONTROLLER
MC68HC11K0VFU4 8-BIT MICROCONTROLLER
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
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