參數(shù)資料
型號(hào)： MC68HC11K1CFN2
廠商： MOTOROLA INC
元件分類(lèi)： 微控制器/微處理器
英文描述： 8-BIT MICROCONTROLLER
中文描述： 8-BIT, MROM, 2 MHz, MICROCONTROLLER, PQCC84
封裝： PLASTIC, LCC-84
文件頁(yè)數(shù)： 29/80頁(yè)
文件大?。?/td> 420K
代理商： MC68HC11K1CFN2
M68HC11 K Series
MC68HC11KTS/D
MOTOROLA
29
W1SZ[1:0] —Window 1 Size
These bits select the size of memory expansion window 1.
W2A[15:13] —Window 2 Base Address
Selects the three most significant bit (MSB) of the base address for memory mapping window 2. Refer
to the table following W1A[15:13].
Bit 4 —Not implemented
Always reads zero
W1A[15:13] —Window Base 1 Address
Selects the three MSB of the base address for memory mapping window 1. Refer to the following table
for additional information.
Bit 0 —Not implemented
Always reads zero
NOTE
A special case exists when the bank size is 32 Kbytes and the window base ad-
dress is $4000. The XA14 signal connected to the ADDR14 pin of the memory de-
vice automatically drives an inverted CPU ADDR14 signal onto the XA14 pin when
the window is active. The effect occurs while the CPU address is in the $4000–
$BFFF range, the XA pins and external physical memory range is $0000–$7FFF.
WxSZ[1:0]
0
0
1
1
Window Size
Window disabled
0
1
0
1
8 K —Window can have up to 64 8-Kbyte banks
16 K —Window can have up to 32 16-Kbyte banks
32 K —Window can have up to 16 32-Kbyte banks
MMWBR
—
Memory Mapping Window Base
$0057
Bit 7
W2A15
0
6
5
4
—
0
3
2
1
Bit 0
—
0
$0057
RESET:
W2A14
0
W2A13
0
W1A15
0
W1A14
0
W1A13
0
MSB Bits
WxA[15:13]
0
0
0
0
1
1
1
1
Window Base Address
16 K
$0000
$0000
$4000
$4000
$8000
$8000
$C000
$C000
8 K
$0000
$2000
$4000
$6000
$8000
$A000
$C000
$E000
32 K
$0000
$0000
$4000
$4000
$8000
$8000
$8000
$8000
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
MM1CR–MM2CR
—Memory Mapping Window 1 and 2 Control
$0058–$0059
Bit 7
—
—
0
6
5
4
3
2
1
Bit 0
—
—
0
$0058
$0059
RESET:
X1A18
X2A18
0
X1A17
X2A17
0
X1A16
X2A16
0
X1A15
X2A15
0
X1A14
X2A14
0
X1A13
X2A13
0
MM1CR
MM2CR
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