參數(shù)資料
型號(hào): MC68HC11K4VFU2
廠商: MOTOROLA INC
元件分類: 微控制器/微處理器
英文描述: MNX Series Enclosure; NEMA Type:1, 2, 4, 4X, 6, 12, 13; Enclosure Material:Polycarbonate; External Height:5.1"; External Width:3"; External Depth:3.9"
中文描述: 8-BIT, MROM, 2 MHz, MICROCONTROLLER, PQFP80
封裝: QFP-80
文件頁數(shù): 69/80頁
文件大?。?/td> 420K
代理商: MC68HC11K4VFU2
M68HC11 K Series
MC68HC11KTS/D
MOTOROLA
69
NOTE
Control bits [7:4] in TMSK2 correspond bit for bit with flag bits [7:4] in TFLG2. Ones
in TMSK2 enable the corresponding interrupt sources.
Bits [3:2] —Not implemented
Always read zero
PR[1:0] —Timer Prescaler Select
In normal modes, PR1 and PR0 can only be written once, and the write must occur within 64 cycles
after reset. Refer to
Table 10
for specific timing values.
Clear flags by writing a one to the corresponding bit position(s).
TOF —Timer Overflow Flag
Set when TCNT changes from $FFFF to $0000
RTIF —Real-Time (Periodic) Interrupt Flag
0 = No RTI interrupt
1 = RTI interrupt request pending
PAOVF —Pulse Accumulator Overflow Flag
Refer to
11 Pulse Accumulator
.
PAIF —Pulse Accumulator Input Edge Flag
Refer to
11 Pulse Accumulator
.
Bits [3:0] —Not implemented
Always read zero
Bit 7 —Not implemented
Always read zero
PAEN —Pulse Accumulator System Enable
Refer to
11 Pulse Accumulator
.
PAMOD —Pulse Accumulator Mode
Refer to
11 Pulse Accumulator
.
PR[1:0]
0 0
0 1
1 0
1 1
Prescaler
1
4
8
16
TFLG2
—Timer Interrupt Flag 2
$0025
Bit 7
6
5
4
3
2
1
Bit 0
TOF
RTIF
PAOVF
PAIF
RESET:
0
0
0
0
0
0
0
0
PACTL
—Pulse Accumulator Control
$0026
Bit 7
6
5
4
3
2
1
Bit 0
PAEN
PAMOD
PEDGE
I4/O5
RTR1
RTR0
RESET:
0
0
0
0
0
0
0
0
相關(guān)PDF資料
PDF描述
MC68HC11K1VFU3 MNX Series Enclosure; NEMA Type:1, 2, 4, 4X, 6, 12, 13; Enclosure Material:Polycarbonate; External Height:10"; External Width:7.1"; External Depth:2.5"; Enclosure Color:Light Gray; Approval Bodies:UL, CSA; Cover Color:Light Gray RoHS Compliant: Yes
MC68HC11K4VFU3 Technical Summary 8-Bit Microcontroller
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