參數(shù)資料
型號(hào): MC68HC705BD3
廠商: Motorola, Inc.
英文描述: 8-Bit Microcontroller Units (MCU).(8位微控制器)
中文描述: 8位微控制器單元(MCU)。(8位微控制器)
文件頁(yè)數(shù): 62/112頁(yè)
文件大小: 676K
代理商: MC68HC705BD3
MOTOROLA
8-2
MC68HC05BD3
SYNC SIGNAL PROCESSOR
8
8.1.1.1
Separate Vertical Sync Input
To test the polarity of the input sync signal, the duration of the low pulse is examined. If the low
period is longer than a specific value (512
μ
s or 1024t
CYC
), as in the case of positive polarity input
sync, the input sync will be inverted before output. For negative polarity input sync signal, it is
anticipated that the duration of the low pulse would be shorter than the specific value, and the input
sync signal passes through to the output without inversion.
This polarity correction is a continuous process, and the error margin is equal to the maximum
permissible sync pulse width specified (512
μ
s or 1024t
CYC
). At power-up or system reset,
negative polarity at input is assumed.
Figure 8-1
Sync Signal Processor Block Diagram
SYNC
DETECTOR
V FREQ.
REGISTER
VSYNC
COUNTER
VSYNC
RESHAPER
SYNC
DETECTOR
POLARITY
CORRECTOR
SYNC SIGNAL
CONTROL REG.
HSYNC
COUNTER
LINE FREQ.
REGISTERS
INTERRUPT
CIRCUIT
COMPOSITE
POLARITY
CORRECTOR
SYNC
SEPARATOR
& INSERTION
R
R
S
CLK GEN.
MUX
MUX
MUX
H
FREE
V
FREE
VSYNC
HSYNC
VTTL
HTTL
HDET
VDET
SOUT
VSIN
FOUT
INTERRUPT
$11
$0D
$0E
V
H
$0F
$10
TPG
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