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參數(shù)資料
| 型號(hào)： | MC68HC705JJ7CDW |
| 廠商： | FREESCALE SEMICONDUCTOR INC |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 8-BIT, OTPROM, 2.1 MHz, MICROCONTROLLER, PDSO20 |
| 封裝： | SOIC-20 |
| 文件頁(yè)數(shù)： | 100/164頁(yè) |
| 文件大?。?/td> | 1165K |
| 代理商： | MC68HC705JJ7CDW |
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Interrupts
MC68HC705JJ7 MC68HC705JP7 Advance Information Data Sheet, Rev. 4.1
40
Freescale Semiconductor
4.7 Programmable Timer Interrupts
The 16-bit programmable timer can generate an interrupt whenever the following events occur:
Input capture
Output compare
Timer counter overflow
Setting the I bit in the condition code register disables timer interrupts. The controls for these interrupts
are in the timer control register (TCR) located at $0012 and in the status bits in the timer status register
(TSR) located at $0013.
4.7.1 Input Capture Interrupt
An input capture interrupt occurs if the input capture flag (ICF) becomes set while the input capture
interrupt enable bit (ICIE) is also set. The ICF flag bit is in the TSR, and the ICIE enable bit is located in
the TCR. The ICF flag bit is cleared by a read of the TSR with the ICF flag bit set, and then followed by a
read of the LSB of the input capture register (ICRL) or by reset. The ICIE enable bit is unaffected by reset.
4.7.2 Output Compare Interrupt
An output compare interrupt occurs if the output compare flag (OCF) becomes set while the output
compare interrupt enable bit (OCIE) is also set. The OCF flag bit is in the TSR and the OCIE enable bit
is in the TCR. The OCF flag bit is cleared by a read of the TSR with the OCF flag bit set, and then followed
by an access to the LSB of the output compare register (OCRL) or by reset. The OCIE enable bit is
unaffected by reset.
4.7.3 Timer Overflow Interrupt
A timer overflow interrupt occurs if the timer overflow flag (TOF) becomes set while the timer overflow
interrupt enable bit (TOIE) is also set. The TOF flag bit is in the TSR and the TOIE enable bit is in the
TCR. The TOF flag bit is cleared by a read of the TSR with the TOF flag bit set, and then followed by an
access to the LSB of the timer registers (TMRL) or by reset. The TOIE enable bit is unaffected by reset.
4.8 Serial Interrupts
The simple serial interface can generate the following interrupts:
Receive sequence complete
Transmit sequence complete
Setting the I bit in the condition code register disables serial interrupts. The controls for these interrupts
are in the serial control register (SCR) located at $000A and in the status bits in the serial status register
(SSR) located at $000B.
A transfer complete interrupt occurs if the serial interrupt flag (SPIF) becomes set while the serial interrupt
enable bit (SPIE) is also set. The SPIF flag bit is in the serial status register (SSR) located at $000B, and
the SPIE enable bit is located in the serial control register (SCR) located at $000A. The SPIF flag bit is
cleared by a read of the SSR with the SPIF flag bit set, and then followed by a read or write to the serial
data register (SDR) located at $000C. The SPIF flag bit can also be reset by writing a one to the SPIR bit
in the SCR.
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PDF描述 |
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| MC68HC705JJ7CP | 8-BIT, OTPROM, 2.1 MHz, MICROCONTROLLER, PDIP20 |
| MC68HC705JJ7S | 8-BIT, UVPROM, 2.1 MHz, MICROCONTROLLER, CDIP20 |
| MC68HC705K1DWR2 | 8-BIT, OTPROM, MICROCONTROLLER, PDSO16 |
| MC68HC705K1CP | 8-BIT, OTPROM, MICROCONTROLLER, PDIP16 |
| MC68HC705K1P | 8-BIT, OTPROM, 2 MHz, MICROCONTROLLER, PDIP16 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MC68HC705JP7CDW | 功能描述:IC MCU 8BIT 28-SOIC RoHS:否 類別:集成電路 (IC) >> 嵌入式 - 微控制器， 系列:HC05 其它有關(guān)文件:STM32F101T8 View All Specifications 特色產(chǎn)品:STM32 32-bit Cortex MCUs 標(biāo)準(zhǔn)包裝:490 系列:STM32 F1 核心處理器:ARM? Cortex?-M3 芯體尺寸:32-位 速度:36MHz 連通性:I²C，IrDA，LIN，SPI，UART/USART 外圍設(shè)備:DMA，PDR，POR，PVD，PWM，溫度傳感器，WDT 輸入/輸出數(shù):26 程序存儲(chǔ)器容量:64KB（64K x 8） 程序存儲(chǔ)器類型:閃存 EEPROM 大小:- RAM 容量:10K x 8 電壓 - 電源 (Vcc/Vdd):2 V ~ 3.6 V 數(shù)據(jù)轉(zhuǎn)換器:A/D 10x12b 振蕩器型:內(nèi)部 工作溫度:-40°C ~ 85°C 封裝/外殼:36-VFQFN，36-VFQFPN 包裝:托盤 配用:497-10030-ND - STARTER KIT FOR STM32497-8853-ND - BOARD DEMO STM32 UNIV USB-UUSCIKSDKSTM32-PL-ND - KIT IAR KICKSTART STM32 CORTEXM3497-8512-ND - KIT STARTER FOR STM32F10XE MCU497-8505-ND - KIT STARTER FOR STM32F10XE MCU497-8304-ND - KIT STM32 MOTOR DRIVER BLDC497-6438-ND - BOARD EVALUTION FOR STM32 512K497-6289-ND - KIT PERFORMANCE STICK FOR STM32MCBSTM32UME-ND - BOARD EVAL MCBSTM32 + ULINK-MEMCBSTM32U-ND - BOARD EVAL MCBSTM32 + ULINK2更多... 其它名稱:497-9032STM32F101T8U6-ND |
| MC68HC705JP7CP | 制造商:Rochester Electronics LLC 功能描述: 制造商:Freescale Semiconductor 功能描述: |
| MC68HC705K1CDW | 制造商:Motorola Inc 功能描述: |
| MC68HC705KJ1CDW | 功能描述:8位微控制器 -MCU 8 Bit 4MHz RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時(shí)鐘頻率:50 MHz 程序存儲(chǔ)器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT |
| MC68HC705KJ1CP | 功能描述:IC MCU 4MHZ 1.2K OTP 16-DIP RoHS:否 類別:集成電路 (IC) >> 嵌入式 - 微控制器， 系列:HC05 其它有關(guān)文件:STM32F101T8 View All Specifications 特色產(chǎn)品:STM32 32-bit Cortex MCUs 標(biāo)準(zhǔn)包裝:490 系列:STM32 F1 核心處理器:ARM? Cortex?-M3 芯體尺寸:32-位 速度:36MHz 連通性:I²C，IrDA，LIN，SPI，UART/USART 外圍設(shè)備:DMA，PDR，POR，PVD，PWM，溫度傳感器，WDT 輸入/輸出數(shù):26 程序存儲(chǔ)器容量:64KB（64K x 8） 程序存儲(chǔ)器類型:閃存 EEPROM 大小:- RAM 容量:10K x 8 電壓 - 電源 (Vcc/Vdd):2 V ~ 3.6 V 數(shù)據(jù)轉(zhuǎn)換器:A/D 10x12b 振蕩器型:內(nèi)部 工作溫度:-40°C ~ 85°C 封裝/外殼:36-VFQFN，36-VFQFPN 包裝:托盤 配用:497-10030-ND - STARTER KIT FOR STM32497-8853-ND - BOARD DEMO STM32 UNIV USB-UUSCIKSDKSTM32-PL-ND - KIT IAR KICKSTART STM32 CORTEXM3497-8512-ND - KIT STARTER FOR STM32F10XE MCU497-8505-ND - KIT STARTER FOR STM32F10XE MCU497-8304-ND - KIT STM32 MOTOR DRIVER BLDC497-6438-ND - BOARD EVALUTION FOR STM32 512K497-6289-ND - KIT PERFORMANCE STICK FOR STM32MCBSTM32UME-ND - BOARD EVAL MCBSTM32 + ULINK-MEMCBSTM32U-ND - BOARD EVAL MCBSTM32 + ULINK2更多... 其它名稱:497-9032STM32F101T8U6-ND |
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