參數(shù)資料
型號(hào): MC68HC705JP7S
廠(chǎng)商: MOTOROLA INC
元件分類(lèi): 微控制器/微處理器
英文描述: HCMOS Microcontroller Unit
中文描述: 8-BIT, UVPROM, 2.1 MHz, MICROCONTROLLER, CDIP28
封裝: WINDOWED, CERDIP-28
文件頁(yè)數(shù): 87/108頁(yè)
文件大?。?/td> 718K
代理商: MC68HC705JP7S
5.0-V DC Electrical Characteristics
MC68HC705KJ1 MC68HRC705KJ1 MC68HLC705KJ1 Data Sheet, Rev. 4.1
Freescale Semiconductor
87
10.5 5.0-V DC Electrical Characteristics
Characteristic
(1)
1. V
DD
= 5.0 Vdc
±
10%, V
SS
= 0 Vdc, T
A
= –40
°
C to +85
°
C, unless otherwise noted.
2. Typical values at midpoint of voltage range, 25
°
C only
3. Run mode I
DD
is measured using external square wave clock source; all inputs 0.2 V from rail; no dc loads; less than 50 pF
on all outputs; C
L
= 20 pF on OSC2.
4. Wait mode I
DD
: only timer system active. Wait mode is affected linearly by OSC2 capacitance. Wait mode is measured
with all ports configured as inputs; V
IL
= 0.2 V; V
IH
= V
DD
– 0.2 V. Wait mode I
DD
is measured using external square wave
clock source; all inputs 0.2 V from rail; no dc loads; less than 50 pF on all outputs; C
L
= 20 pF on OSC2.
5. Stop mode I
DD
is measured with OSC1 = V
SS
. Stop mode I
DD
is measured with all ports configured as inputs; V
IL
= 0.2 V;
V
IH
= V
DD
– 0.2 V.
6. Only input high current rated to +1
μ
A on RESET.
7. The R
OSC
value selected for RC oscillator versions of this device is unspecified.
8. Maximum current drain for all I/O pins combined should not exceed 100 mA.
Symbol
Min
Typ
(2)
Max
Unit
Output high voltage
(I
Load
= –2.5 mA) PA4–PA7
(I
Load
= –5.5 mA) PB2–PB3, PA0–PA3
V
OH
V
DD
–0.8
V
DD
–0.8
V
Output low voltage
(8)
(I
Load
= 10.0 mA) PA0–PA7, PB2–PB3
Input high voltage
PA0–PA7, PB2–PB3, IRQ/V
PP
, RESET, OSC1
Input low voltage
PA0–PA7, PB2–PB3, IRQ/V
PP
, RESET, OSC1
Supply current (f
OP
= 2.1 MHz; f
OSC
= 4.2 MHz)
Run mode
(3)
Wait mode
(4)
Stop mode
(5)
V
OL
0.8
V
V
IH
0.7
×
V
DD
V
DD
V
V
IL
V
SS
0.2
×
V
DD
V
I
DD
4.0
1.0
0.1
6.0
2.8
5.0
mA
mA
μ
A
Supply current (f
OP
= 4.0 MHz; f
OSC
= 8.0 MHz)
Run mode
(3)
Wait mode
(4)
Stop mode
(5)
I
DD
5.2
1.1
0.1
7.0
3.3
5.0
mA
mA
μ
A
I/O Ports Hi-Z leakage current
PA0–PA7, PB2–PB3 (without individual pulldown activated)
I
IL
0.2
±
1
μ
A
Input pulldown current
PA0–PA7, PB2–PB3 (with individual pulldown activated)
I
IL
35
80
200
μ
A
Input pullup current
RESET
I
IL
–15
–35
–85
μ
A
Input current
(6)
RESET, IRQ/V
PP
, OSC1
I
In
0.2
±
1
μ
A
Capacitance
Ports (As Inputs or Outputs)
RESET, IRQ, OSC1, OSC2
C
Out
C
In
12
8
pF
Crystal/ceramic resonator oscillator mode internal resistor
OSC1 to OSC2
(7)
R
OSC
1.0
2.0
3.0
M
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