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參數(shù)資料
| 型號： | MC68HC705KJ1CP |
| 廠商： | 飛思卡爾半導(dǎo)體(中國)有限公司 |
| 英文描述： | Migrating from the MC68HC705K1 to the MC68HC705KJ1 |
| 中文描述： | 從MC68HC705K1遷移到MC68HC705KJ1 |
| 文件頁數(shù)： | 13/16頁 |
| 文件大?。?/td> | 308K |
| 代理商： | MC68HC705KJ1CP |
Application Note
Migrating to the MC68HC705KJ1
AN1746
Timer
The timer on the KJ1 is identical to the K1. No changes are needed in
software or hardware.
COP
The COP on the K1 is enabled by programming the COPEN bit (bit 0) of
the MOR at location $17 to a 1. On the KJ1, program the COPEN bit (bit
0) of the MOR at location $7F1 to a 1.
The K1 COP timer is cleared by writing a 0 to bit 0 of the COPR
(computer operating properly register) at location $3F0. On the KJ1,
clear the COP by writing a 0 to bit 0 of the COPR located at $7F0.
Just like the K1, the KJ1 COP timeout is set by the RT1 and RT0 bits of
the timer status and control register. No code changes are needed.
Personality EPROM
The K1 provides the user with 64 bits of personality EPROM. The KJ1
does not have a personality EPROM array. Consequently, the
personality EPROM bit select register and the personality EPROM
status and control register are not found on the KJ1.
To provide this functionality within the KJ1, utilize some of the extra
EPROM on the KJ1 to create eight bytes or 64 bits of personality
EPROM. This EPROM memory cannot be programmed by the user’s
code. It can be programmed only at the time the entire EPROM array is
being programmed for production.
MOR
The KJ1 gives the designer additional options in the MOR.
Table 3
compares the two MOR registers.
Table 3. MOR Comparison
Part
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
K1
SWPDI
PIN3
RC
SWAIT
LVRE
PIRQ
LEVEL
COPEN
KJ1
SOSCD
EPMSEC
OSCRES
SWAIT
SWPDI
PIRQ
LEVEL
COPEN
F
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
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