參數(shù)資料
型號： MC68HCL05C4AP
廠商： FREESCALE SEMICONDUCTOR INC
元件分類： 微控制器/微處理器
英文描述： 8-BIT, MROM, 2.1 MHz, MICROCONTROLLER, PDIP40
封裝： PLASTIC, DIP-40
文件頁數(shù)： 22/156頁
文件大?。?/td> 992K
代理商： MC68HCL05C4AP
NON-DISCLOSURE
AGREEMENT
REQUIRED
Electrical Specications
General Release Specification
MC68HC05C4A — Rev. 4.0
118
Electrical Specifications
13.7 5.0 V DC Electrical Characteristics
Characteristic (Note 2)
Symbol
Min
Typ
Max
Unit
Output Voltage
ILoad = 10.0 A
ILoad = –10.0 A
VOL
VOH
—
VDD–0.1
—
0.1
—
V
Output High Voltage
(ILoad = –0.8 mA) PA7–PA0, PB7–PB0, PC6–PC0, TCMP
(ILoad = –1.6 mA) PD4–PD1
(ILoad = –5.0 mA) PC7
VOH
VDD–0.8
—
V
Output Low Voltage
(ILoad = 1.6 mA) PA7–PA0, PB7–PB0, PC6–PC0,
PD4–PD1, TCMP
(ILoad = 10 mA) PC7
VOL
—
0.4
V
Input High Voltage
PA7–PA0, PB7–PB0, PC7–PC0, PD7,
PD5–PD0, TCAP, IRQ, RESET, OSC1
VIH
0.7
× V
DD
—VDD
V
Input Low Voltage
PA7–PA0, PB7–PB0, PC7–PC0, PD7,
PD5–PD0, TCAP, IRQ, RESET, OSC1
VIL
VSS
—
0.2
× V
DD
V
Supply Current (4.5–5.5 Vdc @ FBus= 2.1 MHz)
Run (Note 3)
Wait (Note 4)
Stop (Note 5)
25
°C
0
°C to 70 °C (Standard)
–40
°C to +85 °C (Standard)
IDD
—
3.50
1.00
1
—
5.25
3.25
20
40
50
mA
A
I/O Ports Hi-Z Leakage Current
PA7–PA0, PB7–PB0 (Without Pullup)
PC7–PC0, PD7, PD5–PD0
Ioz
——
±10
A
Input Current
RESET, IRQ, OSC1, TCAP, PD7, PD5–PD0
IIn
——
±1
A
Input Pullup Current (Note 6)
PB7–PB0 (With Pullup)
IIn
60
140
300
A
Capacitance
Ports (as Input or Output)
RESET, IRQ, OSC1, TCAP, PD7, PD5, PD0
COut
CIn
—
12
8
pF
NOTES:
1.
VDD = 5.0 Vdc ± 10%, VSS = 0 Vdc, TA = –40 °C to +85 °C, unless otherwise noted.
2.
Typical values reect measurements taken on average processed devices at the midpoint of voltage range, 25
°C only.
3.
Run (operating) IDD measured using external square wave clock source; all I/O pins congured as inputs,
port B = VDD, all other inputs VIL = 0.2 V, VIH = VDD–0.2 V; no DC loads; less than 50 pF on all outputs;
CL = 20 pF on OSC2.
4.
Wait IDDmeasured using external square wave clock source; all I/O pins congured as inputs,
port B = VDD, all other inputs VIL = 0.2 V, VIH = VDD –0.2 V; no DC loads; less than 50 pF on all outputs;
CL = 20 pF on OSC2. Wait IDD is affected linearly by the OSC2 capacitance.
5.
Stop IDD measured with OSC1 = 0.2 V; all I/O pins congured as inputs, port B = VDD, all other inputs
VIL = 0.2 V, VIH = VDD–0.2 V.
6.
Input pullup current measured with VIL = 0.2 V.
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