參數(shù)資料
型號: MC68HCL05C8AFN
廠商: FREESCALE SEMICONDUCTOR INC
元件分類: 微控制器/微處理器
英文描述: 8-BIT, MROM, MICROCONTROLLER, PQCC44
封裝: PLASTIC, LCC-44
文件頁數(shù): 54/116頁
文件大?。?/td> 781K
代理商: MC68HCL05C8AFN
Timer
MC68HC05C8A MC68HCL05C8A MC68HSC05C8A Data Sheet, Rev. 5.1
42
Freescale Semiconductor
Figure 8-1. Timer Block Diagram
The free-running counter is configured to $FFFC during reset and is always a read-only register. During
a power-on reset, the counter is also preset to $FFFC and begins running after the oscillator start-up
delay. Because the free-running counter is 16 bits preceded by a fixed divide-by-four prescaler, the value
in the free-running counter repeats every 262,144 internal bus clock cycles. When the counter rolls over
from $FFFF to $0000, the TOF bit is set. An interrupt can also be enabled whenever counter rollover
occurs by setting its interrupt enable bit (TOIE).
INPUT
CAPTURE
REGISTER
CLOCK
INTERNAL BUS
OUTPUT
COMPARE
REGISTER
HIGH
BYTE
LOW
BYTE
$16
$17
÷ 4
INTERNAL
PROCESSOR
16-BIT FREE
RUNNING
COUNTER
ALTERNATE
REGISTER
8-BIT
BUFFER
HIGH
BYTE
LOW
BYTE
$1A
$1B
$18
$19
HIGH
BYTE
LOW
BYTE
$14
$15
OUTPUT
COMPARE
CIRCUIT
OVERFLOW
DETECT
CIRCUIT
EDGE
DETECT
CIRCUIT
TIMER
STATUS
REGISTER
ICF
OCF
TOF
$13
ICIE
IEDG
OLVL
OUTPUT
LEVEL
REGISTER
RESET
TIMER
CONTROL
REGISTER
$12
OUTPUT
LEVEL
(TCMP)
INTERRUPT
CIRCUIT
TOIE
OCIE
EDGE
INPUT
(TCAP)
D
CLK
C
Q
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