參數(shù)資料
型號： MC68HCL05J1ADWR2
廠商： MOTOROLA INC
元件分類： 微控制器/微處理器
英文描述： 8-BIT, MROM, 2.1 MHz, MICROCONTROLLER, PDSO20
封裝： SOIC-20
文件頁數(shù)： 124/126頁
文件大?。?/td> 1118K
代理商： MC68HCL05J1ADWR2
Electrical Specifications
5.0-Volt DC Electrical Characteristics
MC68HC05J1A — Rev. 1.0
Technical Data
MOTOROLA
Electrical Specifications
97
10.7 5.0-Volt DC Electrical Characteristics
Characteristic(1)
1. VDD = 5.0 Vdc ± 10%; VSS = 0 Vdc; TA = –40°C to +85°C; values reflect average measurements at midpoint of voltage
range at 25
°C
Symbol
Min
Typ
Max
Unit
Output voltage
ILoad = 10.0 A
ILoad = –10.0 A
VOL
VOH
—
VDD – 0.1
—
0.1
—
V
Output high voltage
PA7–PA0, PB5–PB0 (ILoad = –0.8 mA)
VOH
VDD – 0.8
——
V
Output low voltage
PA3–PA0, PB5–PB0 (ILoad = 1.6 mA)
PA7–PA4 (ILoad = 8.0 mA)
VOL
—
0.4
V
Input high voltage
PA7–PA0, PB5–PB0, IRQ, RESET, OSC1
VIH
0.7
× V
DD
—
VDD
V
Input low voltage
PA7–PA0, PB5–PB0, IRQ, RESET, OSC1
VIL
VSS
—
0.2
× V
DD
V
Supply current
Run(2)
Wait(3)
Stop(4)
25
°C
–40
°C to +85°C
2. Run (operating) IDD measured using external square wave clock source (fOSC = 4.2 MHz) with all inputs 0.2 V from rail.
No dc loads. Less than 50 pF on all outputs. CL = 20 pF on OSC2.
3. Wait IDD measured using external square wave clock source (fOSC = 4.2 MHz) with all inputs 0.2 V from rail and only
the timer active. No dc loads. Less than 50 pF on all outputs. CL = 20 pF on OSC2. All ports congured as inputs.
VIL = 0.2 V. VIH =VDD – 0.2 V. OSC2 capacitance linearly affects wait IDD.
4. Stop IDD measured with OSC1 = VSS. All ports congured as inputs. VIL = 0.2 V. VIH =VDD – 0.2 V.
IDD
—
3.0
1.6
0.2
2.0
4.0
2.5
10
20
mA
A
I/O ports hi-z leakage current
PA7–PA0, PB5–PB0 (pulldown device off)
IIL
——
±10
A
Input pulldown current
PA7–PA0, PB5–PB0 (pulldown device on)
IIL
50
100
200
A
Input current
RESET, IRQ, OSC1
IIn
——
±1
A
Capacitance
PA7–PA0, PB5–PB0 (input or output)
RESET, IRQ, OSC1, OSC2
COut
CIn
—
12
8
pF
Oscillator internal resistor
(Crystal/ceramic resonator mask option)
ROSC
1.0
2.0
3.0
M
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