參數(shù)資料
型號: MC68HCP11A1P
廠商: MOTOROLA INC
元件分類: 微控制器/微處理器
英文描述: NPN Epitaxial Silicon Transistor
中文描述: 8-BIT, EEPROM, MICROCONTROLLER, PDIP48
封裝: PLASTIC, DIP-48
文件頁數(shù): 27/45頁
文件大?。?/td> 286K
代理商: MC68HCP11A1P
MC68HC11A8
MC68HC11A8TS/D
MOTOROLA
27
WAKE — Wake Up by Address Mark/Idle
0 = Wake up by IDLE line recognition
1 = Wake up by address mark (most significant data bit set)
TIE — Transmit Interrupt Enable
0 = TDRE interrupts disabled
1 = SCI interrupt requested when TDRE status flag is set
TCIE — Transmit Complete Interrupt Enable
0 = TC interrupts disabled
1 = SCI interrupt requested if TC is set to one
RIE — Receiver Interrupt Enable
0 = RDRF and OR interrupts disabled
1 = SCI interrupt requested when RDRF flag or the OR status flag is set
ILIE — Idle Line Interrupt Enable
0 = IDLE interrupts disabled
1 = SCI interrupt requested when IDLE status flag is set
TE — Transmitter Enable
0 = Transmitter disabled
1 = Transmitter enabled
RE — Receiver Enable
0 = Receiver disabled
1 = Receiver enabled
RWU — Receiver Wake Up Control
0 = Normal SCI receiver
1 = Wake up enabled and receiver interrupts inhibited
SBK — Send Break
0 = Break generator off
1 = Break codes generated as long as SBK is set to one
TDRE — Transmit Data Register Empty Flag
Set if transmit data can be written to SCDR; if TDRE is zero, transmit data register is busy. Cleared by
SCSR read with TDRE set followed by SCDR write.
TC — Transmit Complete Flag
Set if transmitter is idle (no data, preamble, or break transmission in progress). Cleared by SCSR read
with TC set followed by SCDR write.
SCCR2
— SCI Control Register 2
$102D
Bit 7
TIE
0
6
5
4
3
2
1
Bit 0
SBK
0
TCIE
0
RIE
0
ILIE
0
TE
0
RE
0
RWU
0
RESET:
SCSR
— SCI Status Register
$102E
Bit 7
TDRE
1
6
5
4
3
2
1
Bit 0
0
0
TC
1
RDRF
0
IDLE
0
OR
0
NF
0
FE
0
RESET:
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