參數(shù)資料
型號: MC68HSC05C12AFN
廠商: MOTOROLA INC
元件分類: 微控制器/微處理器
英文描述: 8-BIT, MROM, 4.1 MHz, MICROCONTROLLER, PQCC44
封裝: PLASTIC, LCC-44
文件頁數(shù): 106/156頁
文件大小: 756K
代理商: MC68HSC05C12AFN
MC68HC05C12A Rev. 3.0
General Release Specification
MOTOROLA
Timer
53
NON-DISCLOSURE
AGREEMENT
REQUIRED
General Release Specification — MC68HC05C12A
Section 8. Timer
8.1 Contents
8.2 Introduction
The timer consists of a 16-bit, software-programmable counter driven by
a fixed divide-by-four prescaler. This timer can be used for many
purposes, including input waveform measurements while
simultaneously generating an output waveform. Pulse widths can vary
from several microseconds to many seconds. Refer to Figure 8-1 for a
timer block diagram.
Because the timer has a 16-bit architecture, each specific functional
segment (capability) is represented by two registers. These registers
contain the high and low byte of that functional segment. Generally,
accessing the low byte of a specific timer function allows full control of
that function; however, an access of the high byte inhibits that specific
timer function until the low byte is also accessed.
NOTE:
The I bit in the condition code register should be set while manipulating
both the high and low byte register of a specific timer function to ensure
that an interrupt does not occur.
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