MOTOROLA
MC68360 USER’S MANUAL
7-1
SECTION 7
COMMUNICATION PROCESSOR MODULE (CPM)
INTRODUCTION
The CPM includes many blocks that work together to allow an extremely flexible and inte-
grated approach to solving many communications problems. The CPM (see Figure 7-1) in-
cludes the following modules:
RISC Controller
Four Full-Duplex Serial Communication Controllers (SCCs) Support the Following Pro-
tocols:
—IEEE 802.3/Ethernet (Optional Feature on SCC)
—High-Level/Synchronous Data Link Control (HDLC/SDLC)
—HDLC Bus (Multidrop Bus Configuration of HDLC)
—AppleTalk (HDLC-Based Local Area Network (LAN) Protocol)
—Universal Asynchronous Receiver Transmitter (UART)
—Synchronous UART (Isochronous, 1x Clock Mode)
—Binary Synchronous Communication (BISYNC)
—Totally Transparent Operation
—Signaling System #7 (HDLC-Based Protocol. RAM Microcode Option Only)
— Profibus (RAM Microcode Option Only)
—Asynchronous HDLC (RAM Microcode Option Only)
—Multiple Chanel GCI (RAM Microcode Option Only)
—ATM Framing (RAM Microcode Option Only)
—Enhanced Ethernet Filtering (RAM Microcode Option Only)
Four Independent Baud Rate Generators
Two Serial Management Controllers (SMCs) Provide Additional UART and Totally
Transparent Functionality or Support the GCI Channel 0 and 1 Monitor and C/I Chan-
nels in Integrated Services Digital Network (ISDN)
Serial Interface Provides Nonmultiplexed Serial Interface (NMSI) for the Four SCCs (in-
cludes TXD, RXD, TCLK, RCLK, RTS, CTS, and CD pins)
Time Slot Assigner (TSA) Supports Multiplexing of Data from any of the Four SCCs and
Two SMCs onto Two Time-Division Multiplexed (TDM) Interfaces. The TSA Supports
the Following TDM Formats:
—T1/CEPT Lines
—Pulse Code Modulation (PCM) Highway Interface
—ISDN Primary Rate
—Motorola Interchip Digital Link (IDL)
—General Circuit Interface (GCI), also known as IOM-2
—User-Defined Interfaces