MC68HC05X16
5-17
MOTOROLA CAN MODULE (MCAN)
5
Calculation of the bit time
Note:
TSEG2 must be at least 2 tSCL, i.e. the conguration bits must not be 000. (If three
samples per bit mode is selected then TSEG2 must be at least 3 tSCL.)
TSEG1 must be at least as long as TSEG2.
The synchronization jump width (SJW) may not exceed TSEG2, and must be at least
tSCL shorter than TSEG1 to allow for physical propagation delays.
i.e. in terms of tSCL:
SYNC_SEG = 1
TSEG1
≥ SJW + 1
TSEG1
≥ TSEG2
TSEG2
≥ SJW
and
TSEG2
≥ 2
(SAMP = 0)
or
TSEG2
≥ 3
(SAMP = 1)
These boundary conditions result in minimum bit times of 5 tSCL, for one sample, and 7 tSCL, for
three samples per bit.
Table 5-3 Time segment values
TSEG13
TSEG12
TSEG11
TSEG10
Time segment 1
TSEG22
TSEG21
TSEG20
Time segment 2
0
001
2 tSCL cycles
0
1
2 tSCL cycles
0
010
3 tSCL cycles
.
0
011
4 tSCL cycles
.
...
.
1
8 tSCL cycles
.
...
.
1
16 tSCL cycles
BIT_TIME
SYNC_SEG
TSEG1
TSEG2
++
=
77
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Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
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Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com