參數(shù)資料
型號: MC7410TVU400LE
廠商: Freescale Semiconductor
文件頁數(shù): 10/56頁
文件大?。?/td> 0K
描述: MPU RISC 32BIT 360-CBGA
標準包裝: 44
系列: MPC74xx
處理器類型: 32-位 MPC74xx PowerPC
速度: 400MHz
電壓: 1.8V
安裝類型: 表面貼裝
封裝/外殼: 360-BCBGA,F(xiàn)CCBGA
供應(yīng)商設(shè)備封裝: 360-FCCBGA(25x25)
包裝: 托盤
MPC7410 RISC Microprocessor Hardware Specifications, Rev. 6.1
18
Freescale Semiconductor
Electrical and Thermal Characteristics
4.2.3
L2 Clock AC Specifications
The L2CLK frequency is programmed by the L2 Configuration Register (L2CR[4:6]) core-to-L2 divisor ratio. See
Table 14 for example core and L2 frequencies at various divisors. Table 9 provides the potential range of L2CLK
output AC timing specifications as defined in Figure 7.
The L2SYNC_OUT signal is intended to be routed halfway out to the SRAMs and then returned to the L2SYNC_IN
input of the MPC7410 to synchronize L2CLK_OUT at the SRAM with the processor’s internal clock. L2CLK_OUT
at the SRAM can be offset forward or backward in time by shortening or lengthening the routing of L2SYNC_OUT
to L2SYNC_IN. See Freescale Application Note AN1794, Backside L2 Timing Analysis for the PCB Design
Engineer.
The minimum L2CLK frequency in Table 9 is specified by the maximum delay of the internal DLL. The variable-tap
DLL introduces up to a full clock period delay in the L2CLK_OUTA, L2CLK_OUTB, and L2SYNC_OUT signals
so that the returning L2SYNC_IN signal is phase-aligned with the next core clock (divided by the L2 divisor ratio).
Do not choose a core-to-L2 divisor that results in an L2 frequency below this minimum, or the L2CLK_OUT signals
provided for SRAM clocking will not be phase-aligned with the MPC7410 core clock at the SRAMs.
The maximum L2CLK frequency shown in Table 9 is the core frequency divided by one. Very few L2 SRAM
designs will be able to operate in this mode. Most designs will select a greater core-to-L2 divisor to provide a longer
L2CLK period for read and write access to the L2 SRAMs. The maximum L2CLK frequency for any application of
the MPC7410 will be a function of the AC timings of the MPC7410, the AC timings for the SRAM, bus loading,
and printed-circuit board trace length.
Freescale is similarly limited by system constraints and cannot perform tests of the L2 interface on a socketed part
on a functional tester at the maximum frequencies in Table 9. Therefore, functional operation and AC timing
information are tested at core-to-L2 divisors of two or greater.
L2 input and output signals are latched or enabled, respectively, by the internal L2CLK (which is SYSCLK
multiplied up to the core frequency and divided down to the L2CLK frequency). In other words, the AC timings in
Table 10 are entirely independent of L2SYNC_IN. In a closed loop system, where L2SYNC_IN is driven through
the board trace by L2SYNC_OUT, L2SYNC_IN only controls the output phase of L2CLK_OUTA and
L2CLK_OUTB which are used to latch or enable data at the SRAMs. However, since in a closed loop system
L2SYNC_IN is held in phase-alignment with the internal L2CLK, the signals in Table 10 are referenced to this
signal rather than the not-externally-visible internal L2CLK. During manufacturing test, these times are actually
measured relative to SYSCLK.
Table 9. L2CLK Output AC Timing Specifications
At recommended operating conditions (see Table 3)
Parameter
Symbol
400 MHz
450 MHz
500 MHz
Unit
Notes
Min
Max
Min
Max
Min
Max
L2CLK frequency
fL2CLK
133
400
133
400
133
400
MHz
1, 4
L2CLK cycle time
tL2CLK
2.5
7.5
2.5
7.5
2.5
7.5
ns
L2CLK duty cycle
tCHCL/tL2CLK
50
%
2
Internal DLL-relock time
640
640
640
L2CLK
3
DLL capture window
0
10
0
10
0
10
ns
5
L2CLK_OUT
output-to-output skew
tL2CSKW
—50
50
—50
ps
6
相關(guān)PDF資料
PDF描述
IDT71T75802S166BGI8 IC SRAM 18MBIT 166MHZ 119BGA
FMC35DRAI CONN EDGECARD 70POS R/A .100 SLD
MPC8567EVTAQGG MPU POWERQUICC III 1023-PBGA
IDT71T75802S166BGGI8 IC SRAM 18MBIT 166MHZ 119BGA
FMM43DSEF-S13 CONN EDGECARD 86POS .156 EXTEND
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
MC7410VU400LE 功能描述:微處理器 - MPU REV 1.4 105C PB FREE RoHS:否 制造商:Atmel 處理器系列:SAMA5D31 核心:ARM Cortex A5 數(shù)據(jù)總線寬度:32 bit 最大時鐘頻率:536 MHz 程序存儲器大小:32 KB 數(shù)據(jù) RAM 大小:128 KB 接口類型:CAN, Ethernet, LIN, SPI,TWI, UART, USB 工作電源電壓:1.8 V to 3.3 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:FBGA-324
MC7410VU400NE 功能描述:微處理器 - MPU NITRO RV 1.4 ROHS RoHS:否 制造商:Atmel 處理器系列:SAMA5D31 核心:ARM Cortex A5 數(shù)據(jù)總線寬度:32 bit 最大時鐘頻率:536 MHz 程序存儲器大小:32 KB 數(shù)據(jù) RAM 大小:128 KB 接口類型:CAN, Ethernet, LIN, SPI,TWI, UART, USB 工作電源電壓:1.8 V to 3.3 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:FBGA-324
MC7410VU450NE 功能描述:微處理器 - MPU NITRO RV 1.4 ROHS RoHS:否 制造商:Atmel 處理器系列:SAMA5D31 核心:ARM Cortex A5 數(shù)據(jù)總線寬度:32 bit 最大時鐘頻率:536 MHz 程序存儲器大小:32 KB 數(shù)據(jù) RAM 大小:128 KB 接口類型:CAN, Ethernet, LIN, SPI,TWI, UART, USB 工作電源電壓:1.8 V to 3.3 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:FBGA-324
MC7410VU500LE 功能描述:微處理器 - MPU REV 1.4 105C PB FREE RoHS:否 制造商:Atmel 處理器系列:SAMA5D31 核心:ARM Cortex A5 數(shù)據(jù)總線寬度:32 bit 最大時鐘頻率:536 MHz 程序存儲器大小:32 KB 數(shù)據(jù) RAM 大小:128 KB 接口類型:CAN, Ethernet, LIN, SPI,TWI, UART, USB 工作電源電壓:1.8 V to 3.3 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:FBGA-324
MC7411MEL 制造商:Rochester Electronics LLC 功能描述:- Bulk