參數(shù)資料
型號: MC74AC10
廠商: ON SEMICONDUCTOR
英文描述: TRIPLE 3-INPUT NAND GATE
中文描述: 三重3輸入與非門
文件頁數(shù): 2/5頁
文件大?。?/td> 128K
代理商: MC74AC10
MC74AC10 MC74ACT10
5-2
FACT DATA
RECOMMENDED OPERATING CONDITIONS
Symbol
Parameter
Min
Typ
Max
Unit
VCC
Supply Voltage
AC
2.0
5.0
6.0
V
ACT
4.5
5.0
5.5
Vin, Vout
DC Input Voltage, Output Voltage (Ref. to GND)
0
VCC
V
AC Devices except Schmitt Inputs
VCC @ 3.0 V
VCC @ 4.5 V
150
tr, tf
Input Rise and Fall Time (Note 1)
40
ns/V
VCC @ 5.5 V
VCC @ 4.5 V
VCC @ 5.5 V
25
tr, tf
Input Rise and Fall Time (Note 2)
ACT Devices except Schmitt Inputs
10
ns/V
8.0
TJ
TA
IOH
IOL
Junction Temperature (PDIP)
140
°
C
Operating Ambient Temperature Range
–40
25
85
°
C
Output Current — High
–24
mA
Output Current — Low
24
mA
1. Vin from 30% to 70% VCC; see individual Data Sheets for devices that differ from the typical input rise and fall times.
2. Vin from 0.8 V to 2.0 V; see individual Data Sheets for devices that differ from the typical input rise and fall times.
DC CHARACTERISTICS
Symbol
Parameter
(V)
74AC
74AC
Unit
Conditions
VCC
TA = +25
°
C
TA =
–40
°
C to +85
°
C
Typ
Guaranteed Limits
VIH
Minimum High Level
Input Voltage
3.0
4.5
5.5
1.5
2.25
2.75
2.1
3.15
3.85
2.1
3.15
3.85
VOUT = 0.1 V
or VCC – 0.1 V
V
VIL
Maximum Low Level
Input Voltage
3.0
4.5
5.5
1.5
2.25
2.75
0.9
1.35
1.65
0.9
1.35
1.65
VOUT = 0.1 V
or VCC – 0.1 V
V
VOH
Minimum High Level
Output Voltage
3.0
4.5
5.5
2.99
4.49
5.49
2.9
4.4
5.4
2.9
4.4
5.4
IOUT = –50
μ
A
V
V
*VIN = VIL or VIH
3.0
4.5
5.5
2.56
3.86
4.86
2.46
3.76
4.76
–12 mA
–24 mA
–24 mA
IOH
VOL
Maximum Low Level
Output Voltage
3.0
4.5
5.5
0.002
0.001
0.001
0.1
0.1
0.1
0.1
0.1
0.1
IOUT = 50
μ
A
V
V
*VIN = VIL or VIH
3.0
4.5
5.5
0.36
0.36
0.36
0.44
0.44
0.44
12 mA
24 mA
24 mA
IOL
IIN
Maximum Input
Leakage Current
5.5
±
0.1
±
1.0
μ
A
VI = VCC, GND
IOLD
Minimum Dynamic
Output Current
5.5
75
mA
VOLD = 1.65 V Max
IOHD
5.5
–75
mA
VOHD = 3.85 V Min
ICC
Maximum Quiescent
Supply Current
5.5
4.0
40
μ
A
VIN = VCC or GND
* All outputs loaded; thresholds on input associated with output under test.
Maximum test duration 2.0 ms, one output loaded at a time.
Note: IIN and ICC @ 3.0 V are guaranteed to be less than or equal to the respective limit @ 5.5 V VCC.
相關(guān)PDF資料
PDF描述
MC74ACT10 TRIPLE 3-INPUT NAND GATE
MC74AC10D TRIPLE 3-INPUT NAND GATE
MC74AC10N TRIPLE 3-INPUT NAND GATE
MC74ACT10N TRIPLE 3-INPUT NAND GATE
MC74ACT112D DUAL JK NEGATIVE EDGE-TRIGGERED FLIP-FLOP
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
MC74AC109 制造商:ONSEMI 制造商全稱:ON Semiconductor 功能描述:DUAL JK POSITIVE EDGE-TRIGGERED FLIP-FLOP
MC74AC109D 制造商:ONSEMI 制造商全稱:ON Semiconductor 功能描述:Dual JK Positive Edge−Triggered Flip−Flop
MC74AC109DR2 制造商:Motorola Inc 功能描述:Flip Flop, Dual, J/K Type, 16 Pin, Plastic, SOP
MC74AC109DT 制造商:ONSEMI 制造商全稱:ON Semiconductor 功能描述:Dual JK Positive Edge−Triggered Flip−Flop
MC74AC109DTR2 制造商:ONSEMI 制造商全稱:ON Semiconductor 功能描述:Dual JK Positive Edge−Triggered Flip−Flop