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參數(shù)資料
型號(hào): MC74ACT374DWR2
廠商: ON Semiconductor
文件頁(yè)數(shù): 3/10頁(yè)
文件大?。?/td> 0K
描述: IC FLIP-FLOP D OCTAL 3ST 20SOIC
標(biāo)準(zhǔn)包裝: 1
系列: 74ACT
功能: 標(biāo)準(zhǔn)
類(lèi)型: D 型總線
輸出類(lèi)型: 三態(tài)非反相
元件數(shù): 1
每個(gè)元件的位元數(shù): 8
頻率 - 時(shí)鐘: 160MHz
延遲時(shí)間 - 傳輸: 8.5ns
觸發(fā)器類(lèi)型: 正邊沿
輸出電流高,低: 24mA,24mA
電源電壓: 4.5 V ~ 5.5 V
工作溫度: -40°C ~ 85°C
安裝類(lèi)型: 表面貼裝
封裝/外殼: 20-SOIC(0.295",7.50mm 寬)
包裝: 剪切帶 (CT)
其它名稱(chēng): MC74ACT374DWROSCT
MC74AC374, MC74ACT374
http://onsemi.com
2
TRUTH TABLE
Inputs
Outputs
Dn
CP
OE
On
H
L
H
L
X
H
Z
H = HIGH Voltage Level
L = LOW Voltage Level
X = Immaterial
Z = High Impedance
= LOW-to-HIGH Transition
FUNCTIONAL DESCRIPTION
The MC74AC374/74ACT374 consists of eight edge
triggered flipflops with individual Dtype inputs and
3state true outputs. The buffered clock and buffered Output
Enable are common to all flipflops. The eight flipflops
will store the state of their individual D inputs that meet the
setup and hold time requirements on the LOWtoHIGH
Clock (CP) transition. With the Output Enable (OE) LOW,
the contents of the eight flipflops are available at the
outputs. When the OE is HIGH, the outputs go to the high
impedance state. Operation of the OE input does not affect
the state of the flipflops.
Figure 3. Logic Diagram
CP D
QQ
CP D
QQ
CP D
QQ
CP D
QQ
CP D
QQ
CP D
QQ
CP D
QQ
CP D
QQ
D0
D1
D2
D3
D4
D5
D6
D7
O0
O1
O2
O3
O4
O5
O6
O7
OE
CP
NOTE:
That this diagram is provided only for the understanding of logic
operations and should not be used to estimate propagation delays.
MAXIMUM RATINGS
Symbol
Parameter
Value
Unit
VCC
DC Supply Voltage (Referenced to GND)
0.5 to +7.0
V
VIN
DC Input Voltage (Referenced to GND)
0.5 to VCC +0.5
V
VOUT
DC Output Voltage (Referenced to GND)
0.5 to VCC +0.5
V
IIN
DC Input Current, per Pin
±20
mA
IOUT
DC Output Sink/Source Current, per Pin
±50
mA
ICC
DC VCC or GND Current per Output Pin
±50
mA
Tstg
Storage Temperature
65 to +150
°C
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
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