參數(shù)資料
型號: MC74F258AD
廠商: MOTOROLA INC
元件分類: 通用總線功能
英文描述: Processor Supervisory Circuits 5-SOT-23 -40 to 85
中文描述: F/FAST SERIES, QUAD 2 LINE TO 1 LINE MULTIPLEXER, INVERTED OUTPUT, PDSO16
封裝: SOIC-16
文件頁數(shù): 3/3頁
文件大小: 62K
代理商: MC74F258AD
4-132
FAST AND LS TTL DATA
MC74F258A
AC CHARACTERISTICS
74F
74F
TA = +25
°
C
VCC = +5.0 V
CL = 50 pF
Min
TA = 0
°
C to 70
°
C
VCC = 5.0 V
±
10%
CL = 50 pF
Min
Symbol
Parameter
Max
Max
Unit
tPLH
tPHL
tPLH
tPHL
tPZH
tPZL
tPHZ
tPLZ
Propagation Delay
2.5
5.3
2.0
6.0
ns
In to Zn
Propagation Delay
1.0
4.0
1.0
5.0
3.0
7.5
3.0
8.5
ns
S to Zn
Output Enable Time
2.5
7.0
2.5
8.0
2.0
6.0
2.0
7.0
ns
2.5
7.0
2.5
8.0
Output Disable Time
2.0
6.0
2.0
7.0
ns
1.5
6.0
1.5
7.0
FUNCTIONAL DESCRIPTION
The F258A is a quad 2-input multiplexer with 3-state out-
puts. It selects four bits of data from two sources under control
of a common Select input (S). When the Select input is LOW,
the I0x inputs are selected and when Select is HIGH, the I1x
inputs are selected. The data on the selected inputs appears
at the outputs in inverted form. The F258A is the logic imple-
mentation of a 4-pole, 2-position switch where the position of
the switch is determined by the logic levels supplied to the Se-
lect input. The logic equations for the outputs are shown be-
low:
Za = OE
(I1a
S + I0a
S)
Zb = OE
(I1b
S + I0b
S)
Zc = OE
(I1c
S + I0c
S)
Zd = OE
(I1d
S + I0d
S)
When the Output Enable input (OE) is HIGH, the outputs are
forced to a high impedance OFF state. If the outputs of the
3-state devices are tied together, all but one device must be in
the high impedance state to avoid high currents that would ex-
ceed the maximum ratings. Designers should ensure the Out-
put Enable signals to 3-state devices whose outputs are tied
together are designed so there is no overlap.
相關(guān)PDF資料
PDF描述
MC74F258AN QUAD 2-INPUT MULTIPLEXER WITH 3-STATE OUTPUTS
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