參數(shù)資料
型號(hào): MC74HC00ADG
廠商: ON Semiconductor
文件頁數(shù): 1/7頁
文件大小: 0K
描述: IC GATE NAND QUAD 2INP 14-SOIC
標(biāo)準(zhǔn)包裝: 55
系列: 74HC
邏輯類型: 與非門
電路數(shù): 4
輸入數(shù): 2
電源電壓: 2 V ~ 6 V
電流 - 靜態(tài)(最大值): 1µA
輸出電流高,低: 5.2mA,5.2mA
邏輯電平 - 低: 0.5 V ~ 1.8 V
邏輯電平 - 高: 1.5 V ~ 4.2 V
額定電壓和最大 CL 時(shí)的最大傳播延遲: 13ns @ 6V,50pF
工作溫度: -55°C ~ 125°C
安裝類型: 表面貼裝
供應(yīng)商設(shè)備封裝: 14-SOICN
封裝/外殼: 14-SOIC(0.154",3.90mm 寬)
包裝: 管件
產(chǎn)品目錄頁面: 1122 (CN2011-ZH PDF)
其它名稱: MC74HC00ADG-ND
MC74HC00ADGOS
Semiconductor Components Industries, LLC, 2013
October, 2013 Rev. 14
1
Publication Order Number:
MC74HC00A/D
MC74HC00A
Quad 2-Input NAND Gate
HighPerformance SiliconGate CMOS
The MC74HC00A is identical in pinout to the LS00. The device
inputs are compatible with Standard CMOS outputs; with pullup
resistors, they are compatible with LSTTL outputs.
Features
Output Drive Capability: 10 LSTTL Loads
Outputs Directly Interface to CMOS, NMOS and TTL
Operating Voltage Range: 2 to 6 V
Low Input Current: 1 mA
High Noise Immunity Characteristic of CMOS Devices
In Compliance With the JEDEC Standard No. 7 A Requirements
Chip Complexity: 32 FETs or 8 Equivalent Gates
NLV Prefix for Automotive and Other Applications Requiring
Unique Site and Control Change Requirements; AECQ100
Qualified and PPAP Capable
These Devices are PbFree, Halogen Free and are RoHS Compliant
3
Y1
1
A1
PIN 14 = VCC
PIN 7 = GND
LOGIC DIAGRAM
2
B1
6
Y2
4
A2
5
B2
8
Y3
9
A3
10
B3
11
Y4
12
A4
13
B4
Y = AB
Pinout: 14Lead Packages (Top View)
13
14
12
11
10
9
8
2
1
3
4567
VCC
B4
A4
Y4
B3
A3
Y3
A1
B1
Y1
A2
B2
Y2
GND
L
H
L
H
L
H
FUNCTION TABLE
Inputs
Output
AB
H
L
Y
See detailed ordering and shipping information in the package
dimensions section on page 2 of this data sheet.
ORDERING INFORMATION
http://onsemi.com
MARKING
DIAGRAMS
A
= Assembly Location
L, WL
= Wafer Lot
Y, YY
= Year
W, WW = Work Week
G or G
= PbFree Package
TSSOP14
DT SUFFIX
CASE 948G
14
1
SOIC14
D SUFFIX
CASE 751A
14
1
HC
00A
ALYWG
G
1
14
(Note: Microdot may be in either location)
HC00AG
AWLYWW
1
14
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