參數(shù)資料
型號: MC74HC03AN
廠商: MOTOROLA INC
元件分類: 通用總線功能
英文描述: Quad 2-Input NAND Gate With Open-Drain Outputs
中文描述: HC/UH SERIES, QUAD 2-INPUT NAND GATE, PDIP14
封裝: PLASTIC, DIP-14
文件頁數(shù): 1/7頁
文件大小: 175K
代理商: MC74HC03AN
SEMICONDUCTOR TECHNICAL DATA
1
REV 7
Motorola, Inc. 1995
10/95
High–Performance Silicon–Gate CMOS
The MC74HC03A is identical in pinout to the LS03. The device inputs
are compatible with Standard CMOS outputs; with pullup resistors, they
are compatible with LSTTL outputs.
The HC03A NAND gate has, as its outputs, a high–performance MOS
N–Channel transistor. This NAND gate can, therefore, with a suitable
pullup resistor, be used in wired–AND applications. Having the output
characteristic curves given in this data sheet, this device can be used as
an LED driver or in any other application that only requires a sinking
current.
Output Drive Capability: 10 LSTTL Loads With Suitable Pullup Resistor
Outputs Directly Interface to CMOS, NMOS and TTL
High Noise Immunity Characteristic of CMOS Devices
Operating Voltage Range: 2 to 6V
Low Input Current: 1
μ
A
In Compliance With the JEDEC Standard No. 7A Requirements
Chip Complexity: 28 FETs or 7 Equivalent Gates
DESIGN GUIDE
Criteria
Value
Unit
Internal Gate Count*
7.0
ea
Internal Gate Propagation Delay
1.5
ns
Internal Gate Power Dissipation
5.0
μ
W
Speed Power Product
0.0075
pJ
* Equivalent to a two–input NAND gate
PIN 14 = VCC
PIN 7 = GND
* Denotes open–drain outputs
LOGIC DIAGRAM
3,6,8,11Y*
1,4,9,12
A
2,5,10,13
B
OUTPUT
PROTECTION
DIODE
VCC
Pinout: 14–Lead Packages
(Top View)
13
14
12
11
10
9
8
2
1
3
4
5
6
7
VCC
B4
A4
Y4
B3
A3
Y3
A1
B1
Y1
A2
B2
Y2
GND
L
L
H
H
L
H
L
H
FUNCTION TABLE
Inputs
Output
A
B
Z
Z
Z
L
Y
Z = High Impedance
D SUFFIX
SOIC PACKAGE
CASE 751A–03
N SUFFIX
PLASTIC PACKAGE
CASE 646–06
ORDERING INFORMATION
MC74HCXXAN
MC74HCXXAD
MC74HCXXADT
Plastic
SOIC
TSSOP
1
14
1
14
1
14
DT SUFFIX
TSSOP PACKAGE
CASE 948G–01
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